Divider

copperheadhq·fang·examples/parity/elec/layout/divider/divider.kicad_pcb

Divider PCB layout, top view — open source board by copperheadhq

About the Divider PCB

Divider is an open source PCB design by copperheadhq, published on GitHub under the Apache-2.0 license. It is a 2-layer board, with 3 components from 3 distinct parts.

By type, the board carries 2 resistors and 1 capacitor.

From the project

Fang language, DesignGraph kernel, units, interfaces, constraints, transactions and serialization

This is an atopile project whose boards mirror two Fang examples instance for instance: examples/divider/ and examples/blinky/. Both toolchains get the same design, and tests/testparity.py` asserts that what they produce agrees.

A Fang build emits a KiCad netlist. An atopile build emits a .kicadpcb, because atopile has no netlist target and the layout is its artifact. Reduced to what a board is*, both say the same two things, and those are what the test compares:

Divider bill of materials (BOM)

3 components, 3 distinct parts.

QtyPartRefs
1
CL21A106KOQNNNE
Samsung
C1
1
RC0603FR-074K7L
Yageo
R1
1
RC0603FR-0710KL
Yageo
R2

Divider design files

The KiCad project lives in the copperheadhq/fang repository on GitHub; these links point at the commit this page was built from.

Divider: common questions

How big is the Divider PCB?

The Divider has 2 copper layers and is 1.6 mm thick.

How many components are on the Divider?

3 components, from 3 distinct parts. The full bill of materials is listed on this page.

Where can I download the Divider design files?

From the copperheadhq/fang repository on GitHub, which has the KiCad layout; the links under Design files point to each one.

Can I use the Divider design in my own project?

Yes, under the terms of its Apache-2.0 license, which copperheadhq chose for the repository.

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