HardLabs

Smart-Garbage-Collection

cs684-2018·Smart-Garbage-Collection·2018-cs684-Smart-Garbage-Collection/Code/pcbDesign/binLora.kicad_pcb

Smart-Garbage-Collection PCB layout, top view — open source AVR/Arduino board by cs684-2018

About the Smart-Garbage-Collection PCB

Smart-Garbage-Collection is an open source AVR/Arduino PCB design by cs684-2018, published on GitHub. It is a 2-layer board measuring 100.1 × 54.7 mm, with 38 components from 28 distinct parts.

Its main chip is the ATMEGA328-P, from the AVR/Arduino family. Other key parts include the TLV741P and RN2483. By type, the board carries 12 connectors, 8 resistors, 7 capacitors, 3 ICs, 2 transistors and 2 antennas.

From the project

Team Members: 1. Manas Das (163236001) 2. Sambit Senapati(163230013) 3. Emmey Teja(163230003)

Team Members: 1. Manas Das (163236001) 2. Sambit Senapati(163230013) 3. Emmey Teja(163230003)

Project Description: Deploying smart garbage bins for real time waste management system is one of the key applications of a smart city system. Municipal authorities need an efficient way to clear the trash from all public places before it becomes a mess. And this needs to be achieved with the minimum overhead of cost and impact to the city dwellers. LoRaWAN is one of the earlier LPWAN technologies that envisages a city-wide network for keeping track of public infrastructure assets. Once fitted with…

Main components on the Smart-Garbage-Collection

ATMEGA328-PTLV741PRN2483

Smart-Garbage-Collection bill of materials (BOM)

38 components, 28 distinct parts.

QtyPartRefs
1
ATMEGA328-P
IC1
1
TLV741P
U1
1
RN2483
U2
2
IRF540N
Q1, Q2
1
16MHz
Y1
1
Battery IN
J1
1
Boost Input
P1
1
Boost Output
P2
1
Power
P3
1
RTC
P4
1
GPIO_ADC
P5
1
ICSP
P6
1
DEBUG
P7
1
SENSOR
P8
1
PIN_1
P9
1
LORA_PORT
P10
1
PIN_2
P11
1
433 MHz
AE1
1
868 MHz
AE2
1
SW_PUSH
SW1
Show 8 more
QtyPartRefs
2
1N4148
D1, D2
1
0.1uF
C1
1
1uF
C2
3
100nF
C3, C4, C7
2
22pF
C5, C6
2
1K
R1, R6
3
10K
R2, R7, R8
3
0
R3, R4, R5

Smart-Garbage-Collection design files

The KiCad project lives in the cs684-2018/Smart-Garbage-Collection repository on GitHub; these links point at the commit this page was built from.

Smart-Garbage-Collection: common questions

What microcontroller does the Smart-Garbage-Collection use?

The Smart-Garbage-Collection is built around the ATMEGA328-P, from the AVR/Arduino family.

How big is the Smart-Garbage-Collection PCB?

The Smart-Garbage-Collection measures 100.1 × 54.7 mm, has 2 copper layers and is 1.6 mm thick.

How many components are on the Smart-Garbage-Collection?

38 components, from 28 distinct parts. The full bill of materials is listed on this page.

Where can I download the Smart-Garbage-Collection design files?

From the cs684-2018/Smart-Garbage-Collection repository on GitHub, which has the KiCad layout; the links under Design files point to each one.

Can I use the Smart-Garbage-Collection design in my own project?

The repository has no license, so all rights stay with cs684-2018. Use it as a reference, and ask the author before reusing the design.

Can I test firmware for the Smart-Garbage-Collection without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug AVR/Arduino firmware against it before you order a PCB.

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