ESP32 LogicAnalyzer
ESP32 LogicAnalyzer is an open source PCB design by lmcapacho: a 2-layer, 48 × 53.3 mm board with 12 components (6 distinct parts). It is built around the SN74LVC245APW. Filed under test & measurement.
Low-cost logic analyzer using ESP32 for fast digital signal debugging
A SUMP compatible 16Bit Logic Analyzer for ESP32 MCUs.
- Uses ESP32 I2S DMA and can capture speeds up to 20 MHz. - Supports 8-bit and 16-bit operations. - Maximum 128k samples (even in 8-bit capturing mode). - RLE compression supported. - Default OLS port is UART0 with a default baud rate of 912600. - You can configure UART ports and high-speed baud rates for OLS communication by editing the definitions in LogicAnalyzerConfig.h.
Built around
Parts list
12 components, 6 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 2 | SN74LVC245APW | TSSOP-20_4.4x6.5mm_P0.65mm | U1, U2 |
| 2 | CONN_01X15 Conn_01x15 | PinSocket_1x15_P2.54mm_Vertical | J1, J2 |
| 1 | CHANNELS | PinHeader_2x10_P2.54mm_Vertical | J3 |
| 1 | DEBUG | PinHeader_1x03_P2.54mm_Vertical | J4 |
| 2 | 100N 100n | C_0603_1608Metric | C1, C2 |
| 4 | 10K | R_0603_1608Metric | R1, R2, R3, R4 |
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