HardLabs

Asic reticulum

gmlewis·asic-reticulum·hw/pcb/reticulum-hat/reticulum-hat.kicad_pcb

Asic reticulum PCB layout, top view — open source board by gmlewis
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About the Asic reticulum PCB

Asic reticulum is an open source PCB design by gmlewis, published on GitHub under the MIT license. It is a 2-layer board measuring 65 × 56 mm, with 0 components from 0 distinct parts.

It belongs with the rf & radio, power & battery and dev boards & breakouts designs in this gallery.

From the project

SpinalHDL implementation of ASIC hardware for go-reticulum

An Open-Hardware Companion Board for the Reticulum Network Stack with Hardware Cryptographic Acceleration, LoRa Mesh, and Dual-Host Support.

The Universal Reticulum Hat is a high-reliability hardware platform designed to give any Reticulum enthusiast, developer, or emergency responder an instant, pocketable Reticulum communicator.

It bridges the software Reticulum ecosystem (gonomadnet, gorrcd, rnsd) with cutting-edge silicon acceleration (the asic-reticulum Tiny Tapeout ASIC and Gowin Tang Primer 25K FPGA accelerator).

Asic reticulum design files

The KiCad project lives in the gmlewis/asic-reticulum repository on GitHub; these links point at the commit this page was built from.

Asic reticulum: common questions

How big is the Asic reticulum PCB?

The Asic reticulum measures 65 × 56 mm, has 2 copper layers and is 1.6 mm thick.

How many components are on the Asic reticulum?

0 components, from 0 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.

Where can I download the Asic reticulum design files?

From the gmlewis/asic-reticulum repository on GitHub, which has the KiCad layout, the schematic and the BOM; the links under Design files point to each one.

Can I use the Asic reticulum design in my own project?

Yes, under the terms of its MIT license, which gmlewis chose for the repository.

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