G0dzilla vs middle
gowenrw·g0dzilla_vs·eda/g0dzilla_vs/g0dzilla_vs_middle.kicad_pcb
About the G0dzilla vs middle PCB
G0dzilla vs middle is an open source ESP32 PCB design by gowenrw, published on GitHub under the MIT license. It is a 2-layer board measuring 145.9 × 168.5 mm, with 48 components from 13 distinct parts.
Its main chip is the ESP32-WEMOS-LOLIN32-LITE, from the ESP32 family. By type, the board carries 16 diodes, 12 resistors, 8 capacitors, 5 connectors, 1 IC and 1 battery holder.
From the project
This is where all the Electronic Design Automation files for the PCB(s) will be stored. The EDA used is KiCad 7.x unless otherwise specified.
This is where all the Electronic Design Automation files for the PCB(s) will be stored. The EDA used is KiCad 7.x unless otherwise specified.
The KiCad projects have been configured to use local libraries for long term sustainability per the best practices listed HERE and elsewhere.
This is the file structure of this repository
/ - Home /eda - YOU ARE HERE /eda// - KiCad project folder for the named project PCB(s) ./3dmodels/ - This directory contains footprint 3d model files ./gerber/ - This directory contains gerber formatted files for manufacturing ./libfp/ - This directory contains…
Main components on the G0dzilla vs middle
G0dzilla vs middle bill of materials (BOM)
48 components, 13 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | ESP32-WEMOS-LOLIN32-LITE | ESP32_WEMOS_LOLIN32_LITE_back | U1 |
| 1 | Battery_Conn | Battery_Connector_back | J1 |
| 4 | 01x02 | Conn_Pin_Header_Male_Horiz_Back_1x02_Pitch2.54mm | J2, J3, J4, J5 |
| 1 | Battery_Lipo | Battery_Connector_back | BT1 |
| 2 | Conn_02x03_SAO | SAOv169-BADGEv3-PO-minF-2x3 | JSAO1, JSAO2 |
| 2 | Conn_02x03_SAO | SAOv169-BADGEv3-PO-minB-2x3 | JSAO3, JSAO4 |
| 1 | SW_SPDT_SS12D00G | SW_SPDT_Slide_SS12D00G-1P2T_3pin_back | SW1 |
| 5 | LED_3mm | LED_D3.0mm-2-std_front | D1, D2, D3, D4, D5 |
| 3 | LED_3mm | LED_D3.0mm-2-std_back | D6, D7, D8 |
| 8 | LED_WS2812D_5mm | LED_D5.0mm-4_WS2812D_2024_front | D10, D11, D12, D13, D20, D21, D22, D23 |
| 8 | C_Disc_D3 | C_Disc_D3_back | C10, C11, C12, C13, C20, C21, C22, C23 |
| 10 | 47R_6.3mm | R_Axial_DIN0207_L6.3_D2.5_P7.62_Horiz_back | R1, R2, R3, R4, R5, R6, R7, R8 +2 |
| 2 | 100K_6.3mm | R_Axial_DIN0207_L6.3_D2.5_P7.62_Horiz_back | R31, R32 |
G0dzilla vs middle design files
The KiCad project lives in the gowenrw/g0dzilla_vs repository on GitHub; these links point at the commit this page was built from.
G0dzilla vs middle: common questions
What microcontroller does the G0dzilla vs middle use?
The G0dzilla vs middle is built around the ESP32-WEMOS-LOLIN32-LITE, from the ESP32 family.
How big is the G0dzilla vs middle PCB?
The G0dzilla vs middle measures 145.9 × 168.5 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the G0dzilla vs middle?
48 components, from 13 distinct parts. The full bill of materials is listed on this page.
Where can I download the G0dzilla vs middle design files?
From the gowenrw/g0dzilla_vs repository on GitHub, which has the KiCad layout; the links under Design files point to each one.
Can I use the G0dzilla vs middle design in my own project?
Yes, under the terms of its MIT license, which gowenrw chose for the repository.
Can I test firmware for the G0dzilla vs middle without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.
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