Iris-Intern
aayu0-0·Iris-Intern·PCB/IRIS V2/IRIS V2.kicad_pcb
About the Iris-Intern PCB
Iris-Intern is an open source ESP32 PCB design by aayu0-0, published on GitHub. It is a 2-layer board measuring 87.9 × 36.8 mm, with 39 components from 23 distinct parts.
Its main chip is the ESP32-S3-WROOM-1, from the ESP32 family. Other key parts include the TPS563202S. By type, the board carries 14 capacitors, 11 resistors, 4 connectors, 3 diodes, 2 ICs and 2 switches.
From the project
The project was executed in a team-based environment (5 members) with a strong focus on real-world system design practices, including modular architecture, hardware–software co-design, and scalable development.
The project was executed in a team-based environment (5 members) with a strong focus on real-world system design practices, including modular architecture, hardware–software co-design, and scalable development.
The aim was not only to build a functional autonomous system, but to design it the way industry-grade autonomous platforms are actually engineered.
- Intelligent decision-making algorithms - Real-time embedded control - Robust and reliable custom electronics - Human–machine interaction interfaces - Mechanical protection and form factor design
Main components on the Iris-Intern
Iris-Intern bill of materials (BOM)
39 components, 23 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | TPS563202S | SOT-563 | U1 |
| 1 | ESP32-S3-WROOM-1 | ESP32-S3-WROOM-1 | U2 |
| 1 | USB_B_Micro | USB_Micro-B_GCT_USB3076-30-A | J1 |
| 1 | Conn_01x02 | JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical | J2 |
| 1 | Micro_SD_Card | microSD_HC_Hirose_DM3D-SF | J3 |
| 1 | Conn_01x09_Pin | PinHeader_1x09_P2.54mm_Vertical | J4 |
| 1 | Polyfuse | Fuse_Littelfuse-LVR100 | F1 |
| 1 | SPH0645LM4H | Knowles_SPH0645LM4H-6_3.5x2.65mm | MK1 |
| 2 | SW_Push | SW_PUSH_6mm | SW1, SW2 |
| 2 | D_Schottky | D_DO-15_P10.16mm_Horizontal | D1, D2 |
| 1 | LED | LED_1206_3216Metric_Pad1.42x1.75mm_HandSolder | D3 |
| 1 | 1uH | L_6.3x6.3_H3 | L1 |
| 4 | 10uF | C_1206_3216Metric | C1, C2, C9, C14 |
| 6 | 0.1uF | C_1206_3216Metric | C3, C4, C5, C8, C11, C13 |
| 2 | 22uF | C_1206_3216Metric | C6, C7 |
| 2 | 1uF | C_1206_3216Metric | C10, C12 |
| 2 | 22 | R_1206_3216Metric | R1, R2 |
| 1 | 82K | R_1206_3216Metric | R3 |
| 1 | 390K | R_1206_3216Metric | R4 |
| 1 | 100K | R_1206_3216Metric | R5 |
Show 3 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 3 | 0 | R_1206_3216Metric | R6, R7, R8 |
| 2 | 10k | R_1206_3216Metric | R10, R13 |
| 1 | 1K | R_1206_3216Metric | R11 |
Iris-Intern design files
The KiCad project lives in the aayu0-0/Iris-Intern repository on GitHub; these links point at the commit this page was built from.
- LayoutPCB/IRIS V2/IRIS V2.kicad_pcb
- SchematicPCB/IRIS V2/IRIS V2.kicad_sch
Iris-Intern: common questions
What microcontroller does the Iris-Intern use?
The Iris-Intern is built around the ESP32-S3-WROOM-1, from the ESP32 family.
How big is the Iris-Intern PCB?
The Iris-Intern measures 87.9 × 36.8 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the Iris-Intern?
39 components, from 23 distinct parts. The full bill of materials is listed on this page.
Where can I download the Iris-Intern design files?
From the aayu0-0/Iris-Intern repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.
Can I use the Iris-Intern design in my own project?
The repository has no license, so all rights stay with aayu0-0. Use it as a reference, and ask the author before reusing the design.
Can I test firmware for the Iris-Intern without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.
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