Board ram routed
About the Board ram routed
Board ram routed is an open source FPGA PCB design by JCLemme, published on GitHub. It is a 4-layer board measuring 150.1 × 100.1 mm, with 184 components from 44 distinct parts.
Its main chip is the MAX10-10M16SC-E144, from the FPGA family. Other key parts include the EP5388QI, IS45S32800J, CB3LV-3C-50M0000 and MAX3244. By type, the board carries 92 capacitors, 59 resistors, 15 connectors, 7 ICs, 6 switches and 4 diodes.
From the project
An open-source computer
To build the system testbench, you'll need make, Icarus Verilog, and ideally some sort of waveform viewer (like GTKWave). The testbench emulates all of the system's I/O devices, but they aren't connected to anything, so you'll have to read the output waveforms yourself and determine if they're correct or not for debugging. Another thing to pay attention to is the length of time the testbench runs for; running the emulation long enough to catch rare problems might generate VCD files of several hundred megabytes.
Main components on the Board ram routed
Board ram routed bill of materials (BOM)
184 components, 44 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 2 | MAX10-10M16SC-E144 | LQFP-144_20x20mm_Pitch0.5mm | U1, U3 |
| 1 | EP5388QI | QFN-16-ALTERA | U2 |
| 1 | IS45S32800J | TSOP-86 | U4 |
| 2 | CB3LV-3C-50M0000 | CRYSTAL_CTS | U5, U7 |
| 1 | MAX3244 | SSOP-28_5.3x10.2mm_Pitch0.65mm | U8 |
| 1 | POWER_IN_5V | BARREL_JACK | CON1 |
| 1 | SD_INT | microsd_socket | CON2 |
| 1 | SD_A | SD_Card_Receptacle | CON3 |
| 1 | SD_B | SD_Card_Receptacle | CON4 |
| 1 | PRI_PROG | SMD_STRIP_10 | P1 |
| 1 | PRI_DBG | SMD_STRIP_10 | P2 |
| 1 | AUX_DBG | SMD_STRIP_8 | P3 |
| 1 | AUX_PROG | SMD_STRIP_10 | P4 |
| 1 | VGA | DB15F-VGA-AMP | P5 |
| 1 | GPIO | Socket_Strip_Angled_2x09 | P6 |
| 1 | SYSX_EXT | Socket_Strip_Angled_2x07 | P7 |
| 1 | TTL_SERIAL | Socket_Strip_Straight_1x04 | P8 |
| 1 | RS232 | DB_9F | P9 |
| 1 | PS2 | 00JG-MiniDin6 | P10 |
| 1 | SYSX_INT | SMD_STRIP_28 | P11 |
Show 24 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | POWER | SW_SLIDE_PWR | SW1 |
| 1 | CORE_INT | SW_PUSH_SMALL | SW2 |
| 1 | CORE_RST | SW_PUSH_SMALL | SW3 |
| 1 | PRI_CONFIG | SW_PUSH_SMALL | SW4 |
| 1 | AUX_CONFIG | SW_PUSH_SMALL | SW5 |
| 1 | IO_RST | SW_PUSH_SMALL | SW6 |
| 1 | POWER | LED_0805 | D1 |
| 2 | CONF_DONE | LED_0805 | D2, D4 |
| 1 | HALT | LED_0805 | D3 |
| 1 | 600o/500mA | inductor_smd_0603 | L1 |
| 71 | 0.1u | C_0805 | C1, C2, C3, C4, C7, C8, C9, C10 +63 |
| 1 | 10u | C_0805 | C5 |
| 1 | 47u/16v | C_0805 | C6 |
| 18 | 1u | C_0805 | C12, C15, C21, C24, C27, C30, C33, C36 +10 |
| 1 | 4.7u | C_0805 | C17 |
| 13 | 1K | R_0805 | R1, R13, R14, R15, R16, R17, R27, R30 +5 |
| 1 | DNI | R_0805 | R2 |
| 7 | 0 | R_0805 | R3, R4, R5, R20, R21, R40, R41 |
| 2 | 0.1 | R_0805 | R6, R7 |
| 4 | 3.3K | R_0805 | R9, R10, R42, R44 |
| 25 | 10K | R_0805 | R11, R12, R18, R19, R22, R24, R25, R36 +17 |
| 2 | 2K | R_0805 | R26, R29 |
| 3 | 510 | R_0805 | R28, R31, R33 |
| 2 | 100 | R_0805 | R34, R35 |
Board ram routed design files
The KiCad project lives in the JCLemme/eprisc-open-computer repository on GitHub; these links point at the commit this page was built from.
Board ram routed: common questions
What microcontroller does the Board ram routed use?
The Board ram routed is built around the MAX10-10M16SC-E144, from the FPGA family.
How big is the Board ram routed?
The Board ram routed measures 150.1 × 100.1 mm, has 4 copper layers and is 1.6 mm thick.
How many components are on the Board ram routed?
184 components, from 44 distinct parts. The full bill of materials is listed on this page.
Where can I download the Board ram routed design files?
From the JCLemme/eprisc-open-computer repository on GitHub, which has the KiCad layout; the links under Design files point to each one.
Can I use the Board ram routed design in my own project?
The repository has no license, so all rights stay with JCLemme. Use it as a reference, and ask the author before reusing the design.
Can I test firmware for the Board ram routed without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug FPGA firmware against it before you order a PCB.
More boards in eprisc-open-computer
FPGAFirst rev before I fuck it all up
150.1 × 100.1 mm184 parts4LNo license1
FPGALast firstrev preauto
150.1 × 100.1 mm184 parts4LNo license1
FPGATestroute
150.1 × 100.1 mm181 parts2LNo license1
FPGANewrev routed
150.1 × 100.1 mm181 parts4LNo license1
FPGAOld firstrev
150.1 × 100.1 mm181 parts4LNo license1
FPGASecrev premove
150.1 × 100.1 mm175 parts4LNo license1
FPGAEprisc mach
150.1 × 100.1 mm175 parts4LNo license1
FPGASecrev noautobutrest
150.1 × 100.1 mm175 parts4LNo license1
FPGASecrev power
150.1 × 100.1 mm175 parts4LNo license1
FPGAEprisc mach twolayerroute
150.1 × 100.1 mm170 parts4LNo license1
FPGAEprisc mach preautocap
150.1 × 100.1 mm170 parts4LNo license1
Similar boards
FPGABase board
GlasgowEmbedded
80 × 49 mm222 parts4L0BSD2.2k
FPGAThunderscope Rev5.3
EEVengers
122.5 × 103.5 mm817 parts6LMIT1.3k
FPGAUsb sniffer
ataradov
58.2 × 38.1 mm86 parts2LBSD-3-Clause1.3k
FPGATomu, I'm
theacodes
13 × 9.4 mm40 parts4LMIT1.1k
FPGAIcepi zero
cheyao
65 × 30 mm143 parts4LSHL-2.1828
FPGASd2snes
mrehkopf
101.5 × 83 mm147 partsGPL-2.0717