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Eprisc mach twolayerroute

JCLemme·eprisc-open-computer·hardware/eprisc_mach/eprisc_mach_twolayerroute.kicad_pcb

Eprisc mach twolayerroute PCB layout, top view — open source FPGA board by JCLemme

About the Eprisc mach twolayerroute PCB

Eprisc mach twolayerroute is an open source FPGA PCB design by JCLemme, published on GitHub. It is a 4-layer board measuring 150.1 × 100.1 mm, with 170 components from 44 distinct parts.

Its main chip is the MAX10-10M16SC-E144, from the FPGA family. Other key parts include the EP5388QI, IS45S32800J, CB3LV-3C-50M0000 and MAX3244. By type, the board carries 78 capacitors, 59 resistors, 15 connectors, 7 ICs, 6 switches and 4 diodes.

From the project

An open-source computer

To build the system testbench, you'll need make, Icarus Verilog, and ideally some sort of waveform viewer (like GTKWave). The testbench emulates all of the system's I/O devices, but they aren't connected to anything, so you'll have to read the output waveforms yourself and determine if they're correct or not for debugging. Another thing to pay attention to is the length of time the testbench runs for; running the emulation long enough to catch rare problems might generate VCD files of several hundred megabytes.

Main components on the Eprisc mach twolayerroute

MAX10-10M16SC-E144EP5388QIIS45S32800JCB3LV-3C-50M0000MAX3244

Eprisc mach twolayerroute bill of materials (BOM)

170 components, 44 distinct parts.

QtyPartRefs
2
MAX10-10M16SC-E144
U1, U3
1
EP5388QI
U2
1
IS45S32800J
U4
2
CB3LV-3C-50M0000
U5, U7
1
MAX3244
U8
1
POWER_IN_5V
CON1
1
SD_INT
CON2
1
SD_A
CON3
1
SD_B
CON4
1
PRI_PROG
P1
1
PRI_DBG
P2
1
AUX_DBG
P3
1
AUX_PROG
P4
1
VGA
P5
1
GPIO
P6
1
SYSX_EXT
P7
1
TTL_SERIAL
P8
1
RS232
P9
1
PS2
P10
1
SYSX_INT
P11
Show 24 more
QtyPartRefs
1
POWER
SW1
1
CORE_INT
SW2
1
CORE_RST
SW3
1
PRI_CONFIG
SW4
1
AUX_CONFIG
SW5
1
IO_RST
SW6
1
POWER
D1
2
CONF_DONE
D2, D4
1
HALT
D3
1
600o/500mA
L1
57
0.1u
C1, C2, C3, C4, C7, C8, C9, C10 +49
1
10u
C5
1
47u/16v
C6
18
1u
C12, C15, C21, C24, C27, C30, C33, C36 +10
1
4.7u
C17
13
1K
R1, R13, R14, R15, R16, R17, R27, R30 +5
1
DNI
R2
7
0
R3, R4, R5, R20, R21, R40, R41
2
0.1
R6, R7
4
3.3K
R9, R10, R42, R44
25
10K
R11, R12, R18, R19, R22, R24, R25, R36 +17
2
2K
R26, R29
3
510
R28, R31, R33
2
100
R34, R35

Eprisc mach twolayerroute design files

The KiCad project lives in the JCLemme/eprisc-open-computer repository on GitHub; these links point at the commit this page was built from.

Eprisc mach twolayerroute: common questions

What microcontroller does the Eprisc mach twolayerroute use?

The Eprisc mach twolayerroute is built around the MAX10-10M16SC-E144, from the FPGA family.

How big is the Eprisc mach twolayerroute PCB?

The Eprisc mach twolayerroute measures 150.1 × 100.1 mm, has 4 copper layers and is 1.6 mm thick.

How many components are on the Eprisc mach twolayerroute?

170 components, from 44 distinct parts. The full bill of materials is listed on this page.

Where can I download the Eprisc mach twolayerroute design files?

From the JCLemme/eprisc-open-computer repository on GitHub, which has the KiCad layout; the links under Design files point to each one.

Can I use the Eprisc mach twolayerroute design in my own project?

The repository has no license, so all rights stay with JCLemme. Use it as a reference, and ask the author before reusing the design.

Can I test firmware for the Eprisc mach twolayerroute without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug FPGA firmware against it before you order a PCB.

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