Testroute
About the Testroute PCB
Testroute is an open source FPGA PCB design by JCLemme, published on GitHub. It is a 2-layer board measuring 150.1 × 100.1 mm, with 181 components from 47 distinct parts.
Its main chip is the MAX10-10M16SA-E144, from the FPGA family. Other key parts include the EP5388QI, MCP1525, IS45S32800J, CB3LV-3C-50M0000 and MAX3244. By type, the board carries 84 capacitors, 61 resistors, 15 connectors, 8 ICs, 6 switches and 4 diodes.
From the project
An open-source computer
To build the system testbench, you'll need make, Icarus Verilog, and ideally some sort of waveform viewer (like GTKWave). The testbench emulates all of the system's I/O devices, but they aren't connected to anything, so you'll have to read the output waveforms yourself and determine if they're correct or not for debugging. Another thing to pay attention to is the length of time the testbench runs for; running the emulation long enough to catch rare problems might generate VCD files of several hundred megabytes.
Main components on the Testroute
Testroute bill of materials (BOM)
181 components, 47 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 2 | MAX10-10M16SA-E144 | LQFP-144_20x20mm_Pitch0.5mm | U1, U6 |
| 1 | EP5388QI | QFN-16-ALTERA | U2 |
| 1 | MCP1525 | SOT-23 | U3 |
| 1 | IS45S32800J | TSOP-86 | U4 |
| 2 | CB3LV-3C-50M0000 | CRYSTAL_CTS | U5, U7 |
| 1 | MAX3244 | SSOP-28_5.3x10.2mm_Pitch0.65mm | U8 |
| 1 | POWER_IN_5V | BARREL_JACK | CON1 |
| 1 | SD_INT | microsd_socket | CON2 |
| 1 | SD_A | SD_Card_Receptacle | CON3 |
| 1 | SD_B | SD_Card_Receptacle | CON4 |
| 1 | PRI_PROG | Pin_Header_Straight_2x05 | P1 |
| 1 | PRI_DBG | Pin_Header_Straight_2x05 | P2 |
| 1 | AUX_DBG | Pin_Header_Straight_2x04 | P3 |
| 1 | AUX_PROG | Pin_Header_Straight_2x05 | P4 |
| 1 | VGA | DB_15F-VGA | P5 |
| 1 | GPIO | Socket_Strip_Angled_2x09 | P6 |
| 1 | SYSX_EXT | Socket_Strip_Angled_2x07 | P7 |
| 1 | TTL_SERIAL | Socket_Strip_Straight_1x04 | P8 |
| 1 | RS232 | DB_9F | P9 |
| 1 | PS2 | minidin-8 | P10 |
Show 27 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | SYSX_INT | bb080_28 | P11 |
| 1 | POWER | SW_SPDT | SW1 |
| 1 | CORE_INT | smd_push2 | SW2 |
| 1 | CORE_RST | smd_push2 | SW3 |
| 1 | PRI_CONFIG | smd_push2 | SW4 |
| 1 | AUX_CONFIG | smd_push2 | SW5 |
| 1 | IO_RST | smd_push2 | SW6 |
| 1 | GREEN | LED_0805 | D1 |
| 2 | CONF_DONE | LED_0805 | D2, D4 |
| 1 | HALT | LED_0805 | D3 |
| 1 | 600o/500mA | inductor_smd_4.8x2.8mm | L1 |
| 2 | FERRITE_BEAD | inductor_smd_0805 | L2, L3 |
| 60 | 0.1u | C_0805 | C1, C2, C3, C4, C7, C8, C9, C10 +52 |
| 1 | 10u | C_0805 | C5 |
| 1 | 47u/16v | C_0805 | C6 |
| 21 | 1u | C_0805 | C12, C15, C21, C24, C27, C30, C33, C36 +13 |
| 1 | 4.7u | C_0805 | C17 |
| 13 | 1K | R_0805 | R1, R13, R14, R15, R16, R17, R27, R30 +5 |
| 1 | DNI | R_0805 | R2 |
| 9 | 0 | R_0805 | R3, R4, R5, R8, R20, R21, R23, R40 +1 |
| 2 | 0.1 | R_0805 | R6, R7 |
| 4 | 3.3K | R_0805 | R9, R10, R42, R44 |
| 13 | 10K | R_0805 | R11, R12, R18, R19, R22, R24, R25, R36 +5 |
| 2 | 2K | R_0805 | R26, R29 |
| 3 | 510 | R_0805 | R28, R31, R33 |
| 2 | 100 | R_0805 | R34, R35 |
| 12 | 50K | R_0805 | R50, R51, R52, R53, R54, R55, R56, R57 +4 |
Testroute design files
The KiCad project lives in the JCLemme/eprisc-open-computer repository on GitHub; these links point at the commit this page was built from.
Testroute: common questions
What microcontroller does the Testroute use?
The Testroute is built around the MAX10-10M16SA-E144, from the FPGA family.
How big is the Testroute PCB?
The Testroute measures 150.1 × 100.1 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the Testroute?
181 components, from 47 distinct parts. The full bill of materials is listed on this page.
Where can I download the Testroute design files?
From the JCLemme/eprisc-open-computer repository on GitHub, which has the KiCad layout; the links under Design files point to each one.
Can I use the Testroute design in my own project?
The repository has no license, so all rights stay with JCLemme. Use it as a reference, and ask the author before reusing the design.
Can I test firmware for the Testroute without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug FPGA firmware against it before you order a PCB.
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