VESG
KoJZz·Control-Rakatuy·Hardware/after-remap-revisi/after-remap.kicad_pcb
About the VESG PCB
VESG is an open source STM32 PCB design by KoJZz, published on GitHub. It is a 4-layer board measuring 68.2 × 125.3 mm, with 137 components from 52 distinct parts.
Its main chip is the STM32F40X_LQFP64, from the STM32 family. Other key parts include the TC2117, DRV8302, MICROQTJ and SN65HVD232. By type, the board carries 53 capacitors, 50 resistors, 7 diodes, 6 transistors, 5 ICs and 5 connectors.
From the project
.git/: Git configuration (Do not modify) Hardware/: KiCad PCB layout and schematic files. Nanti buat folder baru aja per project Firmware/: Firmware yang dipake Docs/: Documentation Exports/: (Gerbers, BOM, and PDF schematics) testing/: ngetes repo
Main components on the VESG
VESG bill of materials (BOM)
137 components, 52 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | STM32F40X_LQFP64 | lqfp64_pad_mod | U1 |
| 1 | TC2117 | SOT-223_L6.5-W3.5-P2.30-LS7.0-BR | U2 |
| 1 | DRV8302 | TSSOP-56-PP | U3 |
| 1 | MICROQTJ SHOU HAN(首韩) | MICRO-USB-SMD_MICROQTJ-5P | U4 |
| 1 | SN65HVD232 | SOIC-8-W | U401 |
| 6 | IPT007N06NATMA1 Infineon(英飞凌) | HSOF-8_IPT007N06N | Q1, Q2, Q3, Q4, Q5, Q6 |
| 1 | 5TJ480000NYLBC JYJE(晶友嘉) | CRYSTAL-SMD_4P-L5.0-W3.2-BL | X2 |
| 1 | IN+ | PAD | P4 |
| 1 | IN- | PAD | P5 |
| 1 | MOTOR1 | PAD | P6 |
| 1 | MOTOR2 | PAD | P7 |
| 1 | MOTOR3 | PAD | P9 |
| 2 | PWR_COMM | CONN-TH_B7B-PH-K-S-LF-SN | ADC/PWR1, ADCbp1 |
| 1 | CANBUS | CONN-TH_B4B-PH-K-S | CAN1 |
| 2 | 826629-2 Header-Male-2.54_1x2 TE Connectivity(泰科电子) | HDR-TH_2P-P2.54-V-M-1 | H10, H11 |
| 1 | HALL/Encoder | CONN-TH_B6B-PH-K-S | HALL/TEMP1 |
| 1 | SERVO | pinhead-1X03 | K1 |
| 1 | SWD | CONN-TH_B6B-PH-K-S | SWD1 |
| 1 | GREEN | LED0603-R-RD_WHITE | D1 |
| 1 | RED | LED0603-R-RD_WHITE | D2 |
Show 32 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 2 | LED | LED0603-R-RD_WHITE | D3, D7 |
| 2 | ~ | SOD-123_L2.8-W1.8-LS3.7-RD | D4, D6 |
| 1 | TVS 5V | SOD-123_L2.8-W1.8-LS3.7-RD | D5 |
| 1 | 22u | IND-SMD_L6.0-W6.0 | L1 |
| 1 | BLM18AG601SN1D muRata(村田) | L0603 | L2 |
| 8 | 10u,100V | C1210 | C1, C8, C9, C39, C40, C43, C44, C49 |
| 5 | 100n | C0603 | C2, C3, C27, C32, C48 |
| 4 | 4n7 | C0603 | C4, C5, C6, C7 |
| 18 | 2.2u | C0603 | C10, C11, C12, C13, C14, C16, C17, C18 +10 |
| 2 | 15p | C0603 | C15, C38 |
| 1 | 120p | C0603 | C19 |
| 1 | 6.8n | C0603 | C21 |
| 1 | 22n | C0603 | C22 |
| 2 | 100u | CAP-SMD_L3.5-W2.8-R-RD | C25, C33 |
| 4 | 220n | C0603 | C28, C29, C30, C53 |
| 2 | 2.2n | SMD-0603_c | C34, C36 |
| 2 | 15u,100V | C2220 | C37, C51 |
| 3 | 680u | CAP-TH_BD18.0-P7.50-D1.2-FD | C42, C45, C46 |
| 1 | NTC 10k | R0603 | R1 |
| 8 | 10k | R0603 | R2, R6, R7, R8, R9, R10, R20, R402 |
| 9 | 39k | R0603 | R3, R15, R16, R23, R26, R30, R32, R36 +1 |
| 10 | 2k2 | R0603 | R4, R5, R11, R12, R13, R14, R22, R24 +2 |
| 1 | 18k | R0603 | R17 |
| 1 | 3k3 | R0603 | R18 |
| 1 | 15k | R0603 | R19 |
| 1 | 220k | R0603 | R21 |
| 1 | 1M | R0603 | R25 |
| 6 | 4R7 | R0603 | R28, R29, R34, R35, R42, R43 |
| 6 | 100R | R0603 | R37, R38, R48, R49, R50, R51 |
| 2 | WSLP27262L000FEA VISHAY(威世) | R2726 | R53, R54 |
| 2 | 22R | R0603 | R103, R104 |
| 1 | NI | R0603 | R401 |
VESG design files
The KiCad project lives in the KoJZz/Control-Rakatuy repository on GitHub; these links point at the commit this page was built from.
VESG: common questions
What microcontroller does the VESG use?
The VESG is built around the STM32F40X_LQFP64, from the STM32 family.
How big is the VESG PCB?
The VESG measures 68.2 × 125.3 mm, has 4 copper layers and is 1.6062 mm thick.
How many components are on the VESG?
137 components, from 52 distinct parts. The full bill of materials is listed on this page.
Where can I download the VESG design files?
From the KoJZz/Control-Rakatuy repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.
Can I use the VESG design in my own project?
The repository has no license, so all rights stay with KoJZz. Use it as a reference, and ask the author before reusing the design.
Can I test firmware for the VESG without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug STM32 firmware against it before you order a PCB.
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