Selftest
About the Selftest PCB
Selftest is an open source ESP32 PCB design by LimesKey, published on GitHub under the CC-BY-NC-4.0 license. It is a 2-layer board measuring 40 × 30 mm, with 18 components from 16 distinct parts.
Its main chip is the ESP32-S3-WROOM-1-N16R8, from the ESP32 family. By type, the board carries 8 resistors, 3 connectors, 3 capacitors, 1 IC, 1 crystal and 1 diode.
It belongs with the rf & radio and power & battery designs in this gallery.
From the project
A portable LoRa communicator. Custom 4-layer PCB (ESP32-S3 + E22P-915M30S LoRa + NEO-M9N GNSS), designed in KiCad for 915 MHz.
The goal is a self-contained LoRa node that pairs one of the longest range, best value LoRa modules, with an accurate GNSS reciever, running off two 21700 cells in series, to connect to other people on the LoRa mesh network community.
- 4-layer with ENIG, 60 x 130 mm - JLCPCB JLC04161H-7628 stackup, 2 oz copper outer, 2 oz copper inner - L1-L2 prepreg 0.2104 mm, Dk 4.4 - RF: 0.36mm trace width for ~50 Ω CPWG on this stackup, ground rails stitched with 0.3 mm / 0.6 mm vias at roughly 1.5 to 2 mm pitch
Main components on the Selftest
Selftest bill of materials (BOM)
18 components, 16 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | ESP32-S3-WROOM-1-N16R8 MCU_OK Espressif Systems | FP | U1 |
| 1 | 3131M-32.768DT06LL-R50L 32.768kHz HCI | Crystal_SMD_3215-2Pin_3.2x1.5mm | Y1 |
| 1 | HDR HANXIA | PinHeader_1x02_P2.54mm_Vertical | J1 |
| 1 | I2C3 Conn_Coaxial JST | U.FL_Hirose_U.FL-R-SMT-1_Vertical | J2 |
| 1 | I2C1 HDR HANXIA | PinHeader_1x02_P2.54mm_Vertical | J3 |
| 1 | ESDS314DBVR LED Texas Instruments | FP | D1 |
| 1 | MWSA0503S-2R2MT 2.2uH Sunlord | L_4x4mm | L1 |
| 1 | HGC0402R5225K350NTEJ 100nF Chinocera | FP | C1 |
| 1 | HGC0402R5225K350NTEJ 1uF Chinocera | FP | C2 |
| 1 | 10k | FP | C9 |
| 2 | 1RC0402F3309 10k SAE | FP | R1, R2 |
| 1 | 1RC0402F3309 1k SAE | FP | R3 |
| 1 | 1RC0402F3309 0R SAE | FP | R4 |
| 1 | CRCW04020000Z0EDHP 0R Vishay | FP | R5 |
| 1 | FRH0402D1002TS 10k FOJAN | FP | R9 |
| 2 | ARG02DTC0220 10k Viking Tech | FP | R10, R11 |
Selftest design files
The KiCad project lives in the LimesKey/parsnip-node repository on GitHub; these links point at the commit this page was built from.
Selftest: common questions
What microcontroller does the Selftest use?
The Selftest is built around the ESP32-S3-WROOM-1-N16R8, from the ESP32 family.
How big is the Selftest PCB?
The Selftest measures 40 × 30 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the Selftest?
18 components, from 16 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.
Where can I download the Selftest design files?
From the LimesKey/parsnip-node repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.
Can I use the Selftest design in my own project?
It is published under CC-BY-NC-4.0, which limits how it may be reused; read the license before building on it.
Can I test firmware for the Selftest without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.
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