Panelized-6layer

openconcepts-ar·accel2d·hardware/Panelized/Panelized-6layer.kicad_pcb

Panelized-6layer PCB layout, top view — open source FPGA board by openconcepts-ar
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About the Panelized-6layer PCB

Panelized-6layer is an open source FPGA PCB design by openconcepts-ar, published on GitHub under the Custom license license. It is a 6-layer board measuring 70 × 53.6 mm, with 143 components from 52 distinct parts.

Its main chip is the LFE5U-85F-8MG285I, from the FPGA family. Other key parts include the EA3036CQBR, TLV62569APDRLR, MT41K64M16TW-107:J TR, W25Q128JVPIQ and TPS51206DSQR. By type, the board carries 73 capacitors, 41 resistors, 8 connectors, 7 inductors, 6 ICs and 2 diodes.

From the project

Here are the design files for the current 11 boards of this project:

Here are the design files for the current 11 boards of this project:

Processing boards: CPU board ECP5 FPGA board * Spartan-6 FPGA board

Adapter boards: eDP adapter board VGA adapter & connector LVDS adapters single and dual channel DVI adapter * DVI passive adapter

Debugging boards: DVI receiver Touch splitter * I/O board

It features: C906 64-bit RISC-V CPU @1GHz (22nm manufacturing process) Integrated 64MB DDR2 RAM Small size, breadboard compatible SD card socket to store media assets 2 USB-C connectors with Host and OTG (Host/Device) functions, respectively Video output connector…

Panelized-6layer, from the project README
From the project README

Main components on the Panelized-6layer

Panelized-6layer bill of materials (BOM)

143 components, 52 distinct parts.

QtyPartRefs
1
EA3036CQBR
RY1303 or EA3036
U1
1
TLV62569APDRLR
TLV62569APDRL
U2
1
LFE5U-85F-8MG285I
ECP5
U3
1
MT41K64M16TW-107:J TR
MT41K64M16TW-107_J-TR
U4
1
W25Q128JVPIQ
U6
1
TPS51206DSQR
TPS51206
U8
1
Conn_01x6_Male
J2
1
Conn_01x04_Male
J4
1
Conn_01x03
J5
1
PRT-12807
JTAG
J6
2
DF12NB(3.0)-30DS-0.5V(51)
Conn_02x15_Odd_Even
J7, J8
1
TF-018
TF TF-018 1.5mm
J9
1
Conn_01x04
J10
1
SolderJumper_3_Bridged12
JP1
1
OT252048MJBA4SL
OSC1
1
PTS810SJM250SMTRLFS
SW_Push
SW1
2
GT-USB-7010ASV
USB_C_Receptacle_USB2.0
USBD1, USBH1
1
VAL**
mouse-bite-2mm-slot
1
MHPA1010RGBDT
LED_ARGB
D1
1
PMEG4020EPK,315
D_Schottky
D2
Show 32 more
QtyPartRefs
3
BLM15AG601SN1D
600R
FB1, FB2, FB3
4
2.2uH
L1, L2, L3, L4
24
GRM033R61C103KA12D
10nF
C1, C2, C5, C14, C19, C25, C27, C38 +16
1
LMK107BBJ106MALT
10uF
C3
29
CL03A104KQ3NNNC
100nF
C4, C6, C9, C15, C16, C20, C26, C30 +21
5
GRM155R60J106ME44D
10uF
C7, C8, C11, C17, C18
1
CL03A224MQ3NNNC
0.22uF
C10
3
GRM155R61A475MEAAD
4.7uF
C12, C46, C47
1
GRM033R61C103KA12D
100pF
C13
6
JMK105C6105KV-F
1uF
C21, C22, C34, C35, C36, C37
2
GRM188R60J226MEA0D
22uF
C23, C24
1
CL10A475KP8NNNC
4.7uF
C71
4
RC0201FR-07100KL
100k
R1, R13, R14, R25
1
22K 1%
R2
1
RC0201FR-070RL
0R
R3
7
RC0201FR-074K7L
4.7K
R4, R21, R22, R23, R24, R26, R27
3
RC0201FR-07100KL
100k 1%
R5, R17, R18
1
RC0402FR-070RL
0R
R6
2
51K
R7, R8
4
12K
R9, R10, R11, R12
1
120K 1%
R15
1
82K 1%
R16
1
RC0402FR-07240RL
240R
R19
1
RC0201FR-071K5L
1.5K
R20
1
10K
R28
1
0402WGF2103TCE
210K 1%
R29
1
84.5K 1%
R30
2
22
R31, R32
1
RC0201FR-07100KL
15k
R33
1
RC0201FR-07100KL
4.7k
R34
6
WA04X49R9FTL
50R
RN1, RN2, RN3, RN4, RN5, RN6
1
4D02WGJ0103TCE
10K
RN7

Panelized-6layer design files

The KiCad project lives in the openconcepts-ar/accel2d repository on GitHub; these links point at the commit this page was built from.

Panelized-6layer: common questions

What microcontroller does the Panelized-6layer use?

The Panelized-6layer is built around the LFE5U-85F-8MG285I, from the FPGA family.

How big is the Panelized-6layer PCB?

The Panelized-6layer measures 70 × 53.6 mm, has 6 copper layers and is 1.6 mm thick.

How many components are on the Panelized-6layer?

143 components, from 52 distinct parts. The full bill of materials is listed on this page.

Where can I download the Panelized-6layer design files?

From the openconcepts-ar/accel2d repository on GitHub, which has the KiCad layout; the links under Design files point to each one.

Can I use the Panelized-6layer design in my own project?

It is published under Custom license, which limits how it may be reused; read the license before building on it.

Can I test firmware for the Panelized-6layer without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug FPGA firmware against it before you order a PCB.

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