FPGA-I2S-IIR-Filter implementation

SFMonsun·FPGA-I2S-IIR-Filter-implementation·Kicad/FPGAPRO.kicad_pcb

FPGA-I2S-IIR-Filter implementation PCB layout, top view — open source ESP32 board by SFMonsun

About the FPGA-I2S-IIR-Filter implementation PCB

FPGA-I2S-IIR-Filter implementation is an open source ESP32 PCB design by SFMonsun, published on GitHub. It is a 2-layer board measuring 142 × 166.9 mm, with 257 components from 35 distinct parts.

Its main chip is the ESP32-DEVKITC-32E, from the ESP32 family. Other key parts include the NE5532 and LM3915. By type, the board carries 99 diodes, 59 resistors, 44 capacitors, 20 ICs, 4 connectors and 4 switches.

It belongs with the audio designs in this gallery.

Main components on the FPGA-I2S-IIR-Filter implementation

FPGA-I2S-IIR-Filter implementation bill of materials (BOM)

257 components, 35 distinct parts.

QtyPartRefs
1
ESP32-DEVKITC-32E
U1
1
NE5532
U2
9
~
U3, U6, U9, U12, U16, U19, U22, U25 +1
9
LM3915
U5, U8, U11, U15, U18, U23, U24, U27 +1
2
banana
J1, J4
2
audiojackerino
J5, J6
1
PCM1808PWR
ADC1
1
~
Artix_A7_35T1
1
TPS60400QDBVRQ1
ChargePump1
1
PCM5102APWR
DAC1
1
MCP1825S-3302E/DB
LDO1
9
R_Potentiometer
RV1, RV2, RV3, RV4, RV5, RV6, RV7, RV8 +1
2
switch4x4
SW1, SW2
1
SS-10-23NPE
SW3
1
SW_Nidec_CAS-120A1
SW5
9
1.8k
UNK50HZ1, UNK50HZ2, UNK50HZ3, UNK50HZ4, UNK50HZ5, UNK50HZ6, UNK50HZ7, UNK50HZ8 +1
1
USB_C_GSB1C211110DS1HR.
USB-C1
3
LED
3.3V, 5V, -5V
90
LED
D1, D2, D3, D4, D5, D6, D7, D8 +82
9
D
D81, D82, D83, D84, D85, D86, D87, D88 +1
Show 15 more
QtyPartRefs
9
0.1uF
C1, C11, C12, C16, C17, C18, C21, C27 +1
6
1uF
C2, C23, C24, C25, C46, C47
2
C
C3, C4
3
C_Polarized
C8, C9, C10
4
10uf
C13, C14, C15, C22
2
2.2uF
C19, C20
18
1u
C26, C29, C30, C31, C32, C33, C34, C35 +10
2
5.1k
R1, R2
1
1M
R3
2
470
R4, R5
15
1k
R6, R7, R8, R9, R10, R11, R12, R13 +7
3
400
R21, R22, R23
9
330
R26, R30, R34, R36, R42, R46, R50, R54 +1
9
33k
R27, R31, R35, R37, R43, R47, R51, R55 +1
18
R
R28, R29, R32, R33, R38, R39, R40, R41 +10

FPGA-I2S-IIR-Filter implementation design files

The KiCad project lives in the SFMonsun/FPGA-I2S-IIR-Filter-implementation repository on GitHub; these links point at the commit this page was built from.

FPGA-I2S-IIR-Filter implementation: common questions

What microcontroller does the FPGA-I2S-IIR-Filter implementation use?

The FPGA-I2S-IIR-Filter implementation is built around the ESP32-DEVKITC-32E, from the ESP32 family.

How big is the FPGA-I2S-IIR-Filter implementation PCB?

The FPGA-I2S-IIR-Filter implementation measures 142 × 166.9 mm, has 2 copper layers and is 1.6 mm thick.

How many components are on the FPGA-I2S-IIR-Filter implementation?

257 components, from 35 distinct parts. The full bill of materials is listed on this page.

Where can I download the FPGA-I2S-IIR-Filter implementation design files?

From the SFMonsun/FPGA-I2S-IIR-Filter-implementation repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.

Can I use the FPGA-I2S-IIR-Filter implementation design in my own project?

The repository has no license, so all rights stay with SFMonsun. Use it as a reference, and ask the author before reusing the design.

Can I test firmware for the FPGA-I2S-IIR-Filter implementation without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.

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