Flock v2
About the Flock v2 PCB
Flock v2 is an open source PCB design by skiselev, published on GitHub under the CERN-OHL-S-2.0 license. It is a 2-layer board measuring 101.6 × 53.3 mm, with 31 components from 25 distinct parts.
Other key parts include the 37C65, DS1302+, ATF16V8B, 74AHCT174 and 74HCT125. By type, the board carries 11 capacitors, 5 ICs, 4 connectors, 4 resistors, 3 crystals and 3 jumpers.
It belongs with the retro computing designs in this gallery.
From the project
Floppy Controller and Real Time clock for RCBUS systems, compatible with RC2014
Please refer to Assembly Instructions document
Write: Floppy disk controller control configuration register (CCR) Read: Floppy disk controller digital input register (DIR)
Read: Floppy disk controller master status register (MSR)
Read/Write: Data from/to floppy disk controller
Write: Floppy disk controller digital output register (DOR) Read: Toggle floppy disk controller transfer complete (TC) line
Main components on the Flock v2
Flock v2 bill of materials (BOM)
31 components, 25 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | 37C65 | IC_PLCC44_TH | U1 |
| 1 | DS1302+ | IC_DIP8_300 | U2 |
| 1 | ATF16V8B | IC_DIP20_300 | U3 |
| 1 | 74AHCT174 | IC_DIP16_300 | U4 |
| 1 | 74HCT125 | IC_DIP14_300 | U5 |
| 1 | 16MHz | Crystal_HC-49U_Vert | Y1 |
| 1 | 32768Hz | Crystal_32K_Horiz | Y2 |
| 1 | 9.6MHz | Crystal_HC-49U_Vert | Y3 |
| 1 | Floppy | Conn_Pin_Header_17x2_2.54mm_Shrouded_RA | J1 |
| 1 | Floppy 5V | Conn_TE_2-644488-2_2P_2.54mm | J2 |
| 1 | RCBus-80 | Conn_Pin_Header_40x2_2.54mm_Right_Angle_RCBus80 | J3 |
| 1 | GPIO | Conn_Pin_Header_5x1_2.54mm | J4 |
| 1 | CR2032 | Battery_Holder_CR2032_Universal | BT1 |
| 1 | RTC_Address | Conn_Pin_Header_2x1_2.54mm_NoKey | JP1 |
| 1 | RTC_ENA | SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm_NumberLabels | JP2 |
| 1 | DRV | SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm_NumberLabels | JP3 |
| 5 | 100nF | Cap_Cer_508 | C1, C2, C3, C4, C5 |
| 1 | 47uF | Cap_Elec_Radial_6.3mm | C6 |
| 1 | 0.22F | Cap_Super_Radial_13.5mm | C7 |
| 1 | 47pF | Cap_Cer_508 | C8 |
Show 5 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | 15pF | Cap_Cer_508 | C9 |
| 1 | 68pF | Cap_Cer_508 | C10 |
| 1 | 56pF | Cap_Cer_508 | C11 |
| 3 | 10k | Res_762 | R1, R2, R3 |
| 1 | 1k | Conn_SIL6 | RN1 |
Flock v2 design files
The KiCad project lives in the skiselev/flock-v2 repository on GitHub; these links point at the commit this page was built from.
- LayoutKiCad/Z80-FDC-V2.kicad_pcb
- SchematicKiCad/Z80-FDC-V2.kicad_sch
Flock v2: common questions
How big is the Flock v2 PCB?
The Flock v2 measures 101.6 × 53.3 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the Flock v2?
31 components, from 25 distinct parts. The full bill of materials is listed on this page.
Where can I download the Flock v2 design files?
From the skiselev/flock-v2 repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.
Can I use the Flock v2 design in my own project?
Yes, under the terms of its CERN-OHL-S-2.0 license, which skiselev chose for the repository.
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