BMS Host Interface (SPI + DI/DO) Isolator
About the BMS Host Interface (SPI + DI/DO) Isolator PCB
BMS Host Interface (SPI + DI/DO) Isolator is an open source PCB design by TERA-TU-Graz, published on GitHub under the SHL-2.1 license. It is a 4-layer board measuring 32.5 × 32.5 mm, with 21 components from 15 distinct parts.
Other key parts include the TMR_1-1211 and ISO7241. By type, the board carries 6 capacitors, 4 connectors, 4 resistors, 3 ICs, 2 diodes and 1 transistor.
It belongs with the power & battery designs in this gallery, and the repository also holds 1 earlier revision of it.
Main components on the BMS Host Interface (SPI + DI/DO) Isolator
BMS Host Interface (SPI + DI/DO) Isolator bill of materials (BOM)
21 components, 15 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | TMR_1-1211 | TMR_1-XX1X | U1 |
| 2 | ISO7241 | ISO7241 | U2, U3 |
| 1 | BSS205N | BSS205N | Q1 |
| 1 | SPI_master | Molex_PicoBlade_53398-0871_08x1.25mm_Straight | P1 |
| 1 | Host_slave | Molex_PicoBlade_53398-0871_08x1.25mm_Straight | P2 |
| 1 | 12V | JST_XH_B02B-XH-A_02x2.50mm_Straight | P3 |
| 1 | Digital_Master | JST_EH_B02B-EH-A_02x2.50mm_Straight | P4 |
| 1 | 14V | SOD128 | D1 |
| 1 | 12V_OK | LED_0805 | D2 |
| 1 | 4.7uH 1.2A | L_muarta_LQH32PN | L1 |
| 1 | 4.7uF 25V | C_0805in | C1 |
| 1 | 220pF 2kV | C_1206in_HV | C2 |
| 4 | 100n | C_0805in | C3, C4, C5, C6 |
| 3 | 10k | R_0805in | R1, R2, R3 |
| 1 | 12k | R_0603in | R7 |
BMS Host Interface (SPI + DI/DO) Isolator design files
The KiCad project lives in the TERA-TU-Graz/BatteryManagement_2017 repository on GitHub; these links point at the commit this page was built from.
BMS Host Interface (SPI + DI/DO) Isolator: common questions
How big is the BMS Host Interface (SPI + DI/DO) Isolator PCB?
The BMS Host Interface (SPI + DI/DO) Isolator measures 32.5 × 32.5 mm, has 4 copper layers and is 1.6 mm thick.
How many components are on the BMS Host Interface (SPI + DI/DO) Isolator?
21 components, from 15 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.
Where can I download the BMS Host Interface (SPI + DI/DO) Isolator design files?
From the TERA-TU-Graz/BatteryManagement_2017 repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.
Can I use the BMS Host Interface (SPI + DI/DO) Isolator design in my own project?
It is published under SHL-2.1, which limits how it may be reused; read the license before building on it.
More boards in BatteryManagement_2017
BMS Monitor / Balancer for Fennek 2017
55 × 48.5 mm193 parts4LSHL-2.13
STM32BMS Master V6
93.5 × 61 mm165 parts4LSHL-2.13
BMS Host Interface Splitter
57.5 × 49.5 mm154 parts4LSHL-2.13
BMS Master V5
93.5 × 61 mm145 parts4LSHL-2.13
STM32BMS Master V7
77 × 58.5 mm116 parts4LSHL-2.13
Power distribution unit fennek 2017
115.5 × 65 mm62 parts4LSHL-2.13
BMS Balancer
100 × 60 mm56 parts2LSHL-2.13
HostInterfaceFilter
37 × 24 mm44 parts2LSHL-2.13
BMS Interlock
41 × 24.5 mm29 parts2LSHL-2.13
Current sense
32 × 37 mm7 parts2LSHL-2.13
PreCharger V2
50.5 × 36 mm7 parts2LSHL-2.13
Earlier revisions in the repo: Bus_Isolator
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