HW-AEE-Group-E
Yashodhandesh·HW-AEE-Group-E·Hardware-Engineering/PCB_schematics/Final_schemtic.kicad_pcb
About the HW-AEE-Group-E PCB
HW-AEE-Group-E is an open source FPGA PCB design by Yashodhandesh, published on GitHub. It is a 4-layer board measuring 98 × 86.6 mm, with 85 components from 29 distinct parts.
Its main chip is the XC7S50-FTGB196, from the FPGA family. Other key parts include the TPS65581 and CA56-12CGKWA. By type, the board carries 42 capacitors, 27 resistors, 3 ICs, 3 switches, 3 inductors and 2 transistors.
It belongs with the iot & wireless, sensors and displays & leds designs in this gallery.
From the project
Repository: HW-AEE-Group-E Project Folder: Advanced-Embedded-System Semester: Summer Term 2023 Team: Team E – Group 7
Repository: HW-AEE-Group-E Project Folder: Advanced-Embedded-System Semester: Summer Term 2023 Team: Team E – Group 7
This project is a real-time Health Monitoring System that utilizes embedded technologies and IoT concepts to measure, transmit, and visualize vital health data such as heart rate and body temperature. It implements a multi-layered IoT-WSN (Wireless Sensor Network) architecture with MQTT protocol for reliable communication between sensor nodes and a central broker.
Main components on the HW-AEE-Group-E
HW-AEE-Group-E bill of materials (BOM)
85 components, 29 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | TPS65581 | HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.75x3.43mm_ThermalVias | U1 |
| 1 | XC7S50-FTGB196 | Xilinx_FTGB196 | U2 |
| 1 | CA56-12CGKWA | CA56-12CGKWA | U3 |
| 2 | DMN2020L | SOT-23 | Q1, Q2 |
| 1 | DSC61XX | Oscillator_SMD_Abracon_ASE-4Pin_3.2x2.5mm_HandSoldering | X1 |
| 1 | Barrel_Jack_Switch | BarrelJack_Horizontal | J1 |
| 1 | XILINX_JTAG | PinHeader_2x07_P2.00mm_Vertical_SMD | J2 |
| 1 | B3FS_1010P | SW_Push_2P1T_Toggle_CK_PVA1xxH1xxxxxxV2 | S1 |
| 2 | SW_Omron_B3FS | SW_SPST_Omron_B3FS-100xP | SW1, SW2 |
| 2 | ~ | LED_D3.0mm_FlatTop | D1, D2 |
| 3 | 2.2uH | L_6.3x6.3_H3 | L1, L2, L3 |
| 1 | 10u | C_Radial_D4.0mm_H5.0mm_P1.50mm | C1 |
| 2 | 10uf | C_Radial_D4.0mm_H5.0mm_P1.50mm | C2, C3 |
| 1 | 1uf | C_Radial_D4.0mm_H5.0mm_P1.50mm | C4 |
| 6 | 0.1uf | C_Radial_D4.0mm_H5.0mm_P1.50mm | C5, C6, C7, C19, C20, C34 |
| 7 | 22uf | C_Radial_D4.0mm_H5.0mm_P1.50mm | C8, C9, C10, C11, C12, C13, C14 |
| 4 | 47uF | C_Radial_D4.0mm_H5.0mm_P1.50mm | C15, C17, C21, C36 |
| 14 | 0.47uF | C_Radial_D4.0mm_H5.0mm_P1.50mm | C16, C18, C23, C24, C25, C26, C27, C28 +6 |
| 6 | 4.7uF | C_Radial_D4.0mm_H5.0mm_P1.50mm | C22, C31, C32, C33, C37, C38 |
| 1 | 100uF | C_Radial_D4.0mm_H5.0mm_P1.50mm | C35 |
Show 9 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 2 | 100K | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R1, R8 |
| 3 | 2.2K | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R2, R3, R4 |
| 3 | 680 | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R5, R9, R13 |
| 1 | 7.36K | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R6 |
| 1 | 3.0K | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R7 |
| 3 | 4.75K | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R10, R11, R14 |
| 11 | 330 | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R12, R15, R16, R17, R18, R19, R20, R21 +3 |
| 2 | R_Small | R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm | R25, R26 |
| 1 | 10K | SOIC-8_7.5x5.85mm_P1.27mm | RN1 |
HW-AEE-Group-E design files
The KiCad project lives in the Yashodhandesh/HW-AEE-Group-E repository on GitHub; these links point at the commit this page was built from.
HW-AEE-Group-E: common questions
What microcontroller does the HW-AEE-Group-E use?
The HW-AEE-Group-E is built around the XC7S50-FTGB196, from the FPGA family.
How big is the HW-AEE-Group-E PCB?
The HW-AEE-Group-E measures 98 × 86.6 mm, has 4 copper layers and is 1.6 mm thick.
How many components are on the HW-AEE-Group-E?
85 components, from 29 distinct parts. The full bill of materials is listed on this page.
Where can I download the HW-AEE-Group-E design files?
From the Yashodhandesh/HW-AEE-Group-E repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.
Can I use the HW-AEE-Group-E design in my own project?
The repository has no license, so all rights stay with Yashodhandesh. Use it as a reference, and ask the author before reusing the design.
Can I test firmware for the HW-AEE-Group-E without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug FPGA firmware against it before you order a PCB.
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