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PhaseLatch

AndersBNielsen·PhaseLatch

PhaseLatch PCB layout, top view — open source AVR/Arduino board by AndersBNielsen
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About the PhaseLatch PCB

PhaseLatch is an open source AVR/Arduino PCB design by AndersBNielsen, published on GitHub. It is a 4-layer board measuring 68.8 × 53.6 mm, with 120 components from 33 distinct parts.

Its main chip is the 65uino, from the AVR/Arduino family. Other key parts include the HT9201ARSZ, SN74LVC1G132DCKR, 74LVC2G74, IS62C256AL and MIC5504-3.3YM5. By type, the board carries 51 resistors, 33 capacitors, 10 connectors, 8 ICs, 7 diodes and 6 inductors.

It belongs with the rf & radio, dev boards & breakouts and retro computing designs in this gallery.

From the project

20MHz bandwidth SDR IQ ADC

PhaseLatch – 6502-Interfaced High-Speed ADC for Experimental SDR

Blog post & video: https://abnielsen.com/2025/12/24/6502-and-a-20mhz-adc-takes-up-the-challenge/

PhaseLatch is an open-source hardware project that explores how far a classic MOS 6502-class CPU can be pushed into modern signal-processing territory. The board implements a dual-channel, 10-bit, 20 MSPS analog-to-digital converter with a straight binary parallel output, allowing the ADC to be memory-mapped directly onto a 6502 (8 bit) data bus.

PhaseLatch, from the project README
From the project README

Main components on the PhaseLatch

HT9201ARSZSN74LVC1G132DCKR74LVC2G74IS62C256ALMIC5504-3.3YM565uino

PhaseLatch bill of materials (BOM)

120 components, 33 distinct parts.

QtyPartRefs
1
HT9201ARSZ
U1
4
SN74LVC1G132DCKR
U2, U6, U7, U8
1
74LVC2G74
U3
1
IS62C256AL
U4
1
MIC5504-3.3YM5
U5
1
65uino
A1
1
NC
J2
1
Databus
J5
1
Chip select
J6
1
Addressbus
J7
1
Signals
J8
1
I_IN
J20
1
Q_IN
J21
1
CLK_IN
J23
2
Conn_02x10_Odd_Even
P1, P2
2
Jumper_2_Open
JP10, JP21
2
Transformer_1P_SS
T1, T2
7
Green
D1, D2, D3, D4, D5, D6, D7
2
FerriteBead_Small
FB1, FB2
4
1.2uH
L1, L2, L3, L4
Show 13 more
QtyPartRefs
16
100nF
C1, C4, C5, C6, C7, C8, C10, C13 +8
7
10uF
C2, C9, C14, C16, C18, C22, C23
2
47uF
C3, C20
2
1uF
C11, C12
2
620pF
C28, C32
4
330pF
C29, C30, C31, C33
4
4k7
R1, R3, R49, R50
5
0R
R2, R25, R26, R27, R28
18
10k
R4, R5, R6, R7, R8, R11, R12, R13 +10
2
NC
R9, R10
2
1k
R15, R16
12
33
R29, R30, R31, R32, R33, R34, R35, R36 +4
8
10
R39, R40, R41, R42, R43, R44, R45, R46

PhaseLatch design files

The KiCad project lives in the AndersBNielsen/PhaseLatch repository on GitHub; these links point at the commit this page was built from.

PhaseLatch: common questions

What microcontroller does the PhaseLatch use?

The PhaseLatch is built around the 65uino, from the AVR/Arduino family.

How big is the PhaseLatch PCB?

The PhaseLatch measures 68.8 × 53.6 mm, has 4 copper layers and is 1.6062 mm thick.

How many components are on the PhaseLatch?

120 components, from 33 distinct parts. The full bill of materials is listed on this page.

Where can I download the PhaseLatch design files?

From the AndersBNielsen/PhaseLatch repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.

Can I use the PhaseLatch design in my own project?

The repository has no license, so all rights stay with AndersBNielsen. Use it as a reference, and ask the author before reusing the design.

Can I test firmware for the PhaseLatch without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug AVR/Arduino firmware against it before you order a PCB.

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