WiSer-TTL
About the WiSer-TTL PCB
WiSer-TTL is an open source ESP32 PCB design by bitmerse, published on GitHub. It is a 4-layer board measuring 30 × 30 mm, with 68 components from 31 distinct parts.
Its main chip is the ESP32-S2, from the ESP32 family. Other key parts include the USBLC6-2P6, AP2112K-3.3TRG1 and SN74LV6T17BQAR. By type, the board carries 24 capacitors, 15 diodes, 11 resistors, 6 inductors, 5 connectors and 4 ICs.
It belongs with the iot & wireless designs in this gallery.
From the project
WiSer: Bringing wireless convenience to serial connectivity
This directory contains the hardware design files for WiSer-USB and WiSer-TTL, created using KiCad EDA.
Main components on the WiSer-TTL
WiSer-TTL bill of materials (BOM)
68 components, 31 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | USBLC6-2P6 | SOT50P160X60-6N | U1 |
| 1 | AP2112K-3.3TRG1 | SOT95P285X140-5N | U2 |
| 1 | ESP32-S2 | ESP32-S2 | U3 |
| 1 | SN74LV6T17BQAR | WQFN14_BQA_TEX | U4 |
| 1 | 40MHz | Crystal_SMD_2016-4Pin_2.0x1.6mm | Y1 |
| 1 | USB_C_Receptacle_USB2.0 | USB_C_Receptacle_G-Switch_GT-USB-7010ASV | J1 |
| 1 | Conn_01x02 | PinHeader_1x02_P2.54mm_Horizontal | J2 |
| 2 | Conn_01x02 | PinHeader_1x02_P2.54mm_Vertical | J3, J4 |
| 1 | Conn_01x08 | PinHeader_1x08_P2.54mm_Horizontal | J5 |
| 1 | 2450AT18B100E | XDCR_2450AT18B100E | E1 |
| 1 | BOOT | SW_TL3365AF180QG | S1 |
| 7 | ESD9B5.0ST5G | D_SOD-923 | D1, D10, D11, D12, D13, D14, D15 |
| 4 | B5819WS | D_SOD-323_HandSoldering | D2, D3, D4, D5 |
| 1 | ESD9B3.3ST5G | D_SOD-923 | D6 |
| 3 | LED | LED_0402_1005Metric_Pad0.77x0.64mm_HandSolder | D7, D8, D9 |
| 1 | BLM15PX600SN1D | R_0402_1005Metric | FB1 |
| 1 | 2n | L_0402_1005Metric | L1 |
| 1 | L_Ferrite_Coupled_Small_1243 | FIL_DLM0NSM900HY2D | L2 |
| 2 | TBD | L_0402_1005Metric | L3, L5 |
| 1 | 24n | L_0402_1005Metric | L4 |
Show 11 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 10 | 0.1u | C_0402_1005Metric | C1, C3, C5, C7, C8, C10, C11, C14 +2 |
| 3 | 10u | C_0402_1005Metric | C2, C12, C16 |
| 4 | 1u | C_0402_1005Metric | C4, C6, C13, C22 |
| 1 | 100p | C_0402_1005Metric | C9 |
| 6 | TBD | C_0402_1005Metric | C17, C18, C19, C20, C21, C23 |
| 2 | 330 | R_0402_1005Metric | R1, R2 |
| 2 | 5.1K | R_0402_1005Metric | R3, R4 |
| 2 | 10K | R_0402_1005Metric | R5, R8 |
| 1 | 499 | R_0402_1005Metric | R6 |
| 1 | 100K | R_0402_1005Metric | R7 |
| 3 | 180 | R_0402_1005Metric | R9, R10, R11 |
WiSer-TTL design files
The KiCad project lives in the bitmerse/WiSer repository on GitHub; these links point at the commit this page was built from.
WiSer-TTL: common questions
What microcontroller does the WiSer-TTL use?
The WiSer-TTL is built around the ESP32-S2, from the ESP32 family.
How big is the WiSer-TTL PCB?
The WiSer-TTL measures 30 × 30 mm, has 4 copper layers and is 1 mm thick.
How many components are on the WiSer-TTL?
68 components, from 31 distinct parts. The full bill of materials is listed on this page.
Where can I download the WiSer-TTL design files?
From the bitmerse/WiSer repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.
Can I use the WiSer-TTL design in my own project?
The repository has no license, so all rights stay with bitmerse. Use it as a reference, and ask the author before reusing the design.
Can I test firmware for the WiSer-TTL without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.
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