Terasic DE0 SRAM & Raspberry Pi Add-On
costarc·MSX_FPGA_Hat·Hardware Interface/DE0_Addon_Board/DE0_Addon_Board.kicad_pcb
About the Terasic DE0 SRAM & Raspberry Pi Add-On PCB
Terasic DE0 SRAM & Raspberry Pi Add-On is an open source Raspberry Pi PCB design by costarc, published on GitHub under the MIT license. It is a 2-layer board measuring 31.5 × 56.6 mm, with 5 components from 4 distinct parts.
Its main chip is the PinHeader_2x20_P2.54mm_Vertical, from the Raspberry Pi family. Other key parts include the IS61LV25616AL-12T. By type, the board carries 2 connectors, 2 capacitors and 1 IC.
It belongs with the dev boards & breakouts and retro computing designs in this gallery.
From the project
A Cartridge interface that converts MSX 5v signal levels to 3v, exposing an IDC connector for external devices that operates at 3v level.
This is a SRAM Addon for Terasic DE0 development board.
This Add-on is a 8 bits data bus only, 2 x 256KB banks (the DE1 and other models has the same SRAM, but in a 16 bus width).
LBn and UBn enable the two banks (only one should be enabled at any time), because both banks shares the same GPIO pins in the DE0 board.
The Raspberry Pi GPIO header should only be used when CE_n is HIGH (1), which disables teh SRAM and keeps the bus free for the Raspberry Pi.
Main components on the Terasic DE0 SRAM & Raspberry Pi Add-On
Terasic DE0 SRAM & Raspberry Pi Add-On bill of materials (BOM)
5 components, 4 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | IS61LV25616AL-12T | SOP80P1176X120-44N | U1 |
| 1 | DE0/DE1 IDC Connector | PinSocket_2x20_P2.54mm_Vertical | J1 |
| 1 | Raspberry Pi Pin Header | PinHeader_2x20_P2.54mm_Vertical | J3 |
| 2 | C_Small | C_0603_1608Metric_Pad1.08x0.95mm_HandSolder | C1, C2 |
Terasic DE0 SRAM & Raspberry Pi Add-On design files
The KiCad project lives in the costarc/MSX_FPGA_Hat repository on GitHub; these links point at the commit this page was built from.
Terasic DE0 SRAM & Raspberry Pi Add-On: common questions
What microcontroller does the Terasic DE0 SRAM & Raspberry Pi Add-On use?
The Terasic DE0 SRAM & Raspberry Pi Add-On is built around the PinHeader_2x20_P2.54mm_Vertical, from the Raspberry Pi family.
How big is the Terasic DE0 SRAM & Raspberry Pi Add-On PCB?
The Terasic DE0 SRAM & Raspberry Pi Add-On measures 31.5 × 56.6 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the Terasic DE0 SRAM & Raspberry Pi Add-On?
5 components, from 4 distinct parts. The full bill of materials is listed on this page.
Where can I download the Terasic DE0 SRAM & Raspberry Pi Add-On design files?
From the costarc/MSX_FPGA_Hat repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.
Can I use the Terasic DE0 SRAM & Raspberry Pi Add-On design in my own project?
Yes, under the terms of its MIT license, which costarc chose for the repository.
Can I test firmware for the Terasic DE0 SRAM & Raspberry Pi Add-On without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug Raspberry Pi firmware against it before you order a PCB.
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