Ice40-dip40
esynr3z·ice40-dip40·board/ice40-dip40.kicad_pcb
About the Ice40-dip40 PCB
Ice40-dip40 is an open source FPGA PCB design by esynr3z, published on GitHub. It is a 4-layer board measuring 17.8 × 50.8 mm, with 46 components from 24 distinct parts.
Its main chip is the ICE40UP5K-SG48I, from the FPGA family. Other key parts include the W25Q80DVSNIG and MIC5355-S4YMME. By type, the board carries 16 capacitors, 15 resistors, 5 diodes, 4 connectors, 3 ICs and 2 switches.
It belongs with the dev boards & breakouts designs in this gallery.
From the project
Lattice iCE40 Ultra/Ultra+ breakout DIP40-like board
Miniature FPGA development board with DIP40 gabarits
Lattice iCE40UP5KSG48 (iCE40 Ultra, iCE40 UltraPlus compatible - see Notes) Size 17.78mm x 50.8mm (DIP40) 16 MHz external generator Input power voltage: 5V (USB Micro B) USB data lines routed to FPGA 8Mb SPI flash for programming 34 IO pins available (3.3V) CRESET push button and CDONE led User led and user push button RGB led connected to internal driver

Main components on the Ice40-dip40
Ice40-dip40 bill of materials (BOM)
46 components, 24 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | W25Q80DVSNIG | SOIC-8_3.9x4.9mm_P1.27mm | U1 |
| 1 | MIC5355-S4YMME | MSOP-8-1EP_3x3mm_P0.65mm_EP2.54x2.8mm_ThermalVias | U2 |
| 1 | ICE40UP5K-SG48I | QFN-48-1EP_7x7mm_P0.5mm_EP5x5mm_ThermalVias | U3 |
| 1 | ECS-2520MV-160-BN-TR | ECS-2520MV_4Pin_2.5x2.0mm | X1 |
| 1 | Conn_02x04_Odd_Even | PinHeader_2x04_P2.54mm_Vertical | J1 |
| 2 | Conn_01x20 | PinHeader_1x20_P2.54mm_Vertical | J2, J3 |
| 1 | USB_B_Micro | USB_Micro-B_Wurth_629105136821 | J4 |
| 2 | SW_Push | PTS830 | SW1, SW2 |
| 1 | CDBU0520 | SOD-523F | D1 |
| 1 | CLMVC-FKC-CGJJM569aBB7a343 | LED_Cree-PLCC4_2x2mm_CW | D2 |
| 1 | LED_GREEN | LED_0603 | D3 |
| 1 | LED_RED | LED_0603 | D4 |
| 1 | LED_ORANGE | LED_0603 | D5 |
| 2 | 1u | C_0603 | C1, C9 |
| 10 | 100n | C_0603 | C2, C4, C10, C11, C12, C13, C15, C17 +2 |
| 3 | 2.2u | C_0603 | C3, C7, C8 |
| 1 | 10u | C_0603 | C20 |
| 6 | 10k | R_0603 | R1, R2, R4, R5, R6, R12 |
| 1 | 1.5k | R_0603 | R3 |
| 1 | 82 | R_0603 | R7 |
Show 4 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 2 | 22 | R_0603 | R8, R9 |
| 2 | 1k | R_0603 | R10, R13 |
| 1 | 2.2k | R_0603 | R11 |
| 2 | 68 | R_0603 | R14, R15 |
Ice40-dip40 design files
The KiCad project lives in the esynr3z/ice40-dip40 repository on GitHub; these links point at the commit this page was built from.
Ice40-dip40: common questions
What microcontroller does the Ice40-dip40 use?
The Ice40-dip40 is built around the ICE40UP5K-SG48I, from the FPGA family.
How big is the Ice40-dip40 PCB?
The Ice40-dip40 measures 17.8 × 50.8 mm, has 4 copper layers and is 1.6 mm thick.
How many components are on the Ice40-dip40?
46 components, from 24 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.
Where can I download the Ice40-dip40 design files?
From the esynr3z/ice40-dip40 repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.
Can I use the Ice40-dip40 design in my own project?
The repository has no license, so all rights stay with esynr3z. Use it as a reference, and ask the author before reusing the design.
Can I test firmware for the Ice40-dip40 without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug FPGA firmware against it before you order a PCB.
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