Bytesync
About the Bytesync PCB
Bytesync is an open source PCB design by imihajlow, published on GitHub under the GPL-3.0 license. It is a 2-layer board measuring 64 × 28 mm, with 16 components from 11 distinct parts.
Other key parts include the 74HC74 and 74HC08. By type, the board carries 10 connectors, 3 ICs and 3 capacitors.
From the project
An Ethernet to SPI converter using 7400-series ICs
The Nucleo64 shield schematic files are located in sch/shield/.
The firmware for stm32f401 is located in stm32eth-f401/.
The idea is to convert the Manchester-encoded 10BASE-T signal to SPI and use an STM32 MCU to parse it.
A 75C1168 chip is used to convert differential signals to 5V logic levels.
Then, edges are detected using a 74HC86 XOR.
Blue is the input signal, yellow - detected edges.
Main components on the Bytesync
Bytesync bill of materials (BOM)
16 components, 11 distinct parts.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 2 | 74HC74 | SOIC-14_3.9x8.7mm_P1.27mm | U1, U2 |
| 1 | 74HC08 | SOIC-14_3.9x8.7mm_P1.27mm | U3 |
| 1 | MOSI_IN | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J1 |
| 1 | SCK_IN | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J2 |
| 1 | CS_IN | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J3 |
| 2 | VCC | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J4, J5 |
| 2 | GND | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J6, J7 |
| 1 | MOSI_OUT | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J8 |
| 1 | ~{CS_OUT} | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J9 |
| 1 | SCK_OUT | SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief | J10 |
| 3 | 0.1 | C_0805_2012Metric | C1, C2, C3 |
Bytesync design files
The KiCad project lives in the imihajlow/ethernet-to-spi repository on GitHub; these links point at the commit this page was built from.
Bytesync: common questions
How big is the Bytesync PCB?
The Bytesync measures 64 × 28 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the Bytesync?
16 components, from 11 distinct parts. The full bill of materials is listed on this page.
Where can I download the Bytesync design files?
From the imihajlow/ethernet-to-spi repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.
Can I use the Bytesync design in my own project?
Yes, under the terms of its GPL-3.0 license, which imihajlow chose for the repository.
