RailLink
About the RailLink PCB
RailLink is an open source STM32 PCB design by Misaka0x2730, published on GitHub under the CERN-OHL-P-2.0 license. It is a 4-layer board measuring 60 × 28 mm, with 79 components from 33 distinct parts.
Its main chip is the STM32F205RCTx, from the STM32 family. Other key parts include the USBLC6-2SC6, CRE1S0505SC, ADUM4160, LK112M33TR and 74LVC2T45DC. By type, the board carries 37 capacitors, 20 resistors, 12 ICs, 4 connectors, 3 diodes and 2 transistors.
It belongs with the usb & debug tools designs in this gallery.
From the project
Compact isolated version of J-Link v9.
Main components on the RailLink
RailLink bill of materials (BOM)
79 components, 33 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | USBLC6-2SC6 | SOT-23-6 | U1 |
| 1 | CRE1S0505SC | Converter_DCDC_muRata_CRE1xxxxxxSC_THT | U2 |
| 1 | ADUM4160 | SOIC-16W_7.5x10.3mm_P1.27mm | U3 |
| 1 | LK112M33TR | SOT-23-5 | U4 |
| 1 | STM32F205RCTx | LQFP-64_10x10mm_P0.5mm | U5 |
| 6 | 74LVC2T45DC | VSSOP-8_2.3x2mm_P0.5mm | U6, U7, U8, U9, U10, U11 |
| 1 | MCP6002-xMS | VSSOP-8_3.0x3.0mm_P0.65mm | U12 |
| 1 | IRLML2502 | SOT-23 | Q1 |
| 1 | IRLML6402 | SOT-23 | Q2 |
| 1 | 12MHz | Crystal_SMD_3225-4Pin_3.2x2.5mm | Y1 |
| 1 | USB_C_Receptacle_USB2.0 | USB_C_Receptacle_HRO_TYPE-C-31-M-12 | J1 |
| 1 | SWD | PinHeader_1x03_P2.54mm_Vertical | J2 |
| 1 | VEE_3V3 | PinHeader_1x02_P2.54mm_Vertical | J3 |
| 1 | TARGET | IDC-Header_2x05_P2.54mm_Horizontal | J4 |
| 1 | STATUS | LED_D3.0mm-3 | D1 |
| 2 | MBR0530 | D_SOD-123 | D2, D3 |
| 1 | 4.7n/2kV | C_1812_4532Metric | C1 |
| 2 | 4.7u | C_0603_1608Metric | C2, C15 |
| 25 | 100n | C_0402_1005Metric | C3, C4, C5, C6, C12, C16, C19, C20 +17 |
| 1 | 10u | C_0603_1608Metric | C7 |
Show 13 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | 1u | C_0603_1608Metric | C8 |
| 2 | 18p | C_0402_1005Metric | C9, C10 |
| 3 | 10n | C_0402_1005Metric | C11, C14, C18 |
| 2 | 2.2u | C_0603_1608Metric | C13, C17 |
| 1 | 1M | R_1206_3216Metric | R1 |
| 4 | 22 | R_0402_1005Metric | R2, R5, R6, R7 |
| 3 | 5.1k | R_0402_1005Metric | R3, R4, R9 |
| 1 | 51 | R_0402_1005Metric | R8 |
| 1 | 2.2 | R_0402_1005Metric | R10 |
| 4 | 470 | R_Array_Concave_4x0603 | RN1, RN5, RN6, RN7 |
| 3 | 10k | R_Array_Concave_4x0603 | RN2, RN3, RN4 |
| 1 | 100 | R_Array_Concave_4x0603 | RN8 |
| 2 | 220k | R_Array_Concave_4x0603 | RN9, RN10 |
RailLink design files
The KiCad project lives in the Misaka0x2730/RailLink repository on GitHub; these links point at the commit this page was built from.
RailLink: common questions
What microcontroller does the RailLink use?
The RailLink is built around the STM32F205RCTx, from the STM32 family.
How big is the RailLink PCB?
The RailLink measures 60 × 28 mm, has 4 copper layers and is 1.176 mm thick.
How many components are on the RailLink?
79 components, from 33 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.
Where can I download the RailLink design files?
From the Misaka0x2730/RailLink repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.
Can I use the RailLink design in my own project?
Yes, under the terms of its CERN-OHL-P-2.0 license, which Misaka0x2730 chose for the repository.
Can I test firmware for the RailLink without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug STM32 firmware against it before you order a PCB.
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