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Panel

YDrip·ydrip-pcb

Panel PCB layout, top view — open source ESP32 board by YDrip
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About the Panel PCB

Panel is an open source ESP32 PCB design by YDrip, published on GitHub under the CERN-OHL-W-2.0 license. It is a 4-layer board measuring 227.8 × 132.5 mm, with 345 components from 39 distinct parts.

Its main chip is the ESP32-S3-WROOM-1U-N16, from the ESP32 family. Other key parts include the RT9080-33GJ5, ALT021-10E, SLG47004V, PCF8563TS and IN-PI22TAT5R5G5B. By type, the board carries 22 resistors, 20 capacitors, 8 ICs, 5 connectors, 4 transistors and 2 crystals.

From the project

YDrip hardware files

This repository contains the open-source hardware design files for a water meter. The design was created using KiCad 6.

- High-precision water metering - Low power consumption - Compact and cost-effective design - Compatible with standard water metering infrastructure - Customizable digital logic

This project is licensed under the CERN Open Hardware Licence Version 2 - Weakly Reciprocal. Please see the LICENSE.txt file for more details.

Panel, from the project README
From the project README

Main components on the Panel

RT9080-33GJ5ESP32-S3-WROOM-1U-N16ALT021-10ESLG47004VPCF8563TSIN-PI22TAT5R5G5BMB85RC64TAPNF-G-BDERE1SLG88103V

Panel bill of materials (BOM)

345 components, 39 distinct parts — part numbers from the project's BOM.

QtyPartRefs
1
RT9080-33GJ5
U1
1
ESP32-S3-WROOM-1U-N16
ESP32-S3-WROOM-1
U2
1
ALT021-10E
U3
1
SLG47004V
U4
1
PCF8563TS
U5
1
IN-PI22TAT5R5G5B
U6
1
MB85RC64TAPNF-G-BDERE1
MB85RC64TA
U8
1
SLG88103V
U9
2
BSS84LT1G
BSS84
Q1, Q2
2
MMBT3904LT1G
MMBT3904
Q3, Q4
2
ABS07-32.768KHZ-T
Y1, Y2
1
B2B-PH-SM4-TB
Conn_01x02_Female
J1
1
PH1-06-UA
Conn_01x06_Male
J3
1
105133-0001
USB_B_Micro
J4
1
PH1-04-UA
Conn_01x04_Male
J5
1
2465
J6
1
MF-NSMF110
F1
280
NPTH
KiKit_MB_1_1, KiKit_MB_1_2, KiKit_MB_1_3, KiKit_MB_1_4, KiKit_MB_1_5, KiKit_MB_1_6, KiKit_MB_1_7, KiKit_MB_1_8 +272
2
PTS526 SK15 SMTR2 LFS
PTS526_SK15_SMTR2_LFS
S1, S2
1
LED
D2
Show 19 more
QtyPartRefs
4
CL21C220JBANNNC
22pF
C1, C2, C7, C13
3
CL21B105KAFNNNE
1uF
C3, C9, C10
1
CL21A226MQQNNNE
22uF
C4
2
CL21A106KPFNNNG
10uF
C5, C8
7
08053C104KAT4A
0.1uF
C6, C14, C15, C17, C18, C19, C20
2
CL21C101JBANNND
100pF
C11, C12
1
08053C104KAT4A
100pF
C16
3
CRCW080510K0FKEAC
10k
R1, R12, R20
2
RC0805FR-070RL
0
R2, R3
2
10K
R4, R9
2
CRCW08054R70FKEA
4.7k
R5, R7
1
4.7k
R6
2
CRCW0805100KJNEAC
100k
R8, R15
2
CRCW08051M00FKEA
10M
R10, R14
1
CRCW08052K00FKEAC
2k
R11
1
CRCW0805510RFKEAC
500R
R13
2
CRCW080520K0FKEAC
50k
R16, R17
2
CRCW08051M00FKEA
1M
R18, R19
2
CRCW080510K0FKEAC
10K
R21, R22

Panel design files

The KiCad project lives in the YDrip/ydrip-pcb repository on GitHub; these links point at the commit this page was built from.

Panel: common questions

What microcontroller does the Panel use?

The Panel is built around the ESP32-S3-WROOM-1U-N16, from the ESP32 family.

How big is the Panel PCB?

The Panel measures 227.8 × 132.5 mm, has 4 copper layers and is 1.6 mm thick.

How many components are on the Panel?

345 components, from 39 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.

Where can I download the Panel design files?

From the YDrip/ydrip-pcb repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.

Can I use the Panel design in my own project?

Yes, under the terms of its CERN-OHL-W-2.0 license, which YDrip chose for the repository.

Can I test firmware for the Panel without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.

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