SDRAM six layer draft JLC06161H-2116A
SDRAM six layer draft JLC06161H-2116A is an open source STM32 PCB design by rjwalters: a 6-layer, 100 × 80 mm board with 43 components (17 distinct parts). It is built around the STM32F429ZIT6, IS42S16400J-6TLI, AP2112K-3.3TRG1.
Standalone Python tools for parsing and manipulating KiCad schematic and PCB files
A standalone STM32F429ZIT6 MCU tests an IS42S16400J-6TLI-TR x16 SDR SDRAM. The real circuit replaces the former synthetic DDR/MIPI/HDMI routing fixture. It uses a six-layer board, 43 purchasable components and 216 connected pads. Firmware runs the MCU at 96 MHz and the memory at 48 MHz, tests all 8 MiB, and reports through status LEDs and a 3.3 V UART.
Manufacturing readiness is recorded in output/readiness.json and verified against the exact source, rules, evidence and exported package. Use output/manufacturing.zip only when that report is current and Ready. Hardware testing remains…
Built around
Parts list
43 components, 17 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | STM32F429ZIT6 | LQFP-144_20x20mm_P0.5mm | U1 |
| 1 | IS42S16400J-6TLI IS42S16400J-6TLI-TR | TSOP-II-54_22.2x10.16mm_P0.8mm | U2 |
| 1 | AP2112K-3.3TRG1 | SOT-23-5 | U3 |
| 1 | 5V_INPUT | PinHeader_1x02_P2.54mm_Vertical | J1 |
| 1 | SWD_3V3 | PinHeader_1x06_P2.54mm_Vertical | J2 |
| 1 | UART_3V3 | PinHeader_1x03_P2.54mm_Vertical | J3 |
| 1 | C125094 GREEN | LED_0603_1608Metric | D1 |
| 1 | C94869 RED | LED_0603_1608Metric | D2 |
| 21 | 100NF 100nF | C_0603_1608Metric | C1, C2, C3, C4, C5, C6, C7, C8 +13 |
| 2 | 4.7UF 4.7uF | C_0603_1608Metric | C20, C21 |
| 1 | 1UF 1uF | C_0603_1608Metric | C23 |
| 2 | 2.2UF 2.2uF | C_0603_1608Metric | C24, C25 |
| 2 | 10UF 10uF | C_0603_1608Metric | C26, C27 |
| 2 | 10NF 10nF | C_0603_1608Metric | C29, C30 |
| 1 | C21189 0R | R_0603_1608Metric | R1 |
| 2 | 10K 10k | R_0603_1608Metric | R2, R3 |
| 2 | 1k | R_0603_1608Metric | R4, R5 |
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