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Final H00 panelicad

Vedatori·Time-O-Mat·Hardware/Manufacturing/Final H00 panelicad_pcb.kicad_pcb

Final H00 panelicad PCB layout, top view — open source ESP32 board by Vedatori

About the Final H00 panelicad PCB

Final H00 panelicad is an open source ESP32 PCB design by Vedatori, published on GitHub. It is a 2-layer board measuring 240 × 174.3 mm, with 86 components from 31 distinct parts.

Its main chip is the ESP32-WROOM-32D, from the ESP32 family. Other key parts include the DS18B20, DS1302ZN+, AMS1117-3.3 and CH340G. By type, the board carries 22 capacitors, 21 diodes, 17 resistors, 8 connectors, 5 ICs and 4 transistors.

It belongs with the iot & wireless and sensors designs in this gallery.

From the project

Addressable LED clock kit aimed for usage in STEM education. The ultimate solution to time telling...

If the USB C standard in the cable and power adapter in use is properly implemented, one of the CC pins should always read 0V and the second one should be on one of the following voltage levels: 0,42V - legcy USB (1000mA most of the times) 0,94V - 1500mA 1,68V - 3000mA The order of CC pins (e.g. if CC1 is 0V and CC2 is one of the three voltages or vice versa) is determined by the orientation of the cable and does not matter in our application.

Main components on the Final H00 panelicad

ESP32-WROOM-32DDS18B20DS1302ZN+AMS1117-3.3CH340G

Final H00 panelicad bill of materials (BOM)

86 components, 31 distinct parts — part numbers from the project's BOM.

QtyPartRefs
1
ESP32-WROOM-32D
U1
1
DS18B20
U2
1
DS1302ZN+
U3
1
AMS1117-3.3
U4
1
CH340G
U5
2
2N7002
Q1, Q4
2
S8050
Q2, Q3
1
Crystal_GND2
Y1
5
Conn_02x04_Odd_Even
J1, J2, J3, J4, J5
1
Conn_01x06_Male
J6
1
918-418K2023S40001
J7
1
Conn_01x03
J8
1
Buzzer
BZ1
1
CoufalElektronika_logo
G1
1
CoufalElektronika_logo
G2
1
Vedatori_logo
G3
3
SW_SPST
SW1, SW2, SW3
1
VAL**
mouse-bite-2mm-slot
9
C2761795
WS2812E
D1, D2, D3, D4, D5, D6, D7, D8 +1
12
C2843785
WS2812E
D10, D11, D12, D13, D14, D15, D16, D17 +4
Show 11 more
QtyPartRefs
18
C1525
100nF
C1, C2, C3, C4, C7, C8, C9, C10 +10
2
C1525
100n
C5, C6
1
C1525
100u
C19
1
C19702
10uF
C22
1
C23179
75R
R1
5
10K
R2, R13, R15, R16, R17
1
4K7
R3
4
5K1
R4, R5, R6, R7
2
470R
R8, R9
2
12K
R10, R11
2
R_Photo
R12, R14

Final H00 panelicad design files

The KiCad project lives in the Vedatori/Time-O-Mat repository on GitHub; these links point at the commit this page was built from.

Final H00 panelicad: common questions

What microcontroller does the Final H00 panelicad use?

The Final H00 panelicad is built around the ESP32-WROOM-32D, from the ESP32 family.

How big is the Final H00 panelicad PCB?

The Final H00 panelicad measures 240 × 174.3 mm, has 2 copper layers and is 1.6 mm thick.

How many components are on the Final H00 panelicad?

86 components, from 31 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.

Where can I download the Final H00 panelicad design files?

From the Vedatori/Time-O-Mat repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.

Can I use the Final H00 panelicad design in my own project?

The repository has no license, so all rights stay with Vedatori. Use it as a reference, and ask the author before reusing the design.

Can I test firmware for the Final H00 panelicad without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.

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