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Bldc sic

klaus-liebler·esp32-bldc-controller·pcb/bldc_sic.kicad_pcb

Bldc sic PCB layout, top view — open source ESP32 board by klaus-liebler

About the Bldc sic PCB

Bldc sic is an open source ESP32 PCB design by klaus-liebler, published on GitHub under the MIT license. It is a 2-layer board measuring 60 × 63 mm, with 113 components from 61 distinct parts.

Its main chip is the ESP32-S3-WROOM-1, from the ESP32 family. Other key parts include the DRV8323HRTAR, TP6841S6, MT6816, SRV05-4 and SN65HVD230. By type, the board carries 46 capacitors, 23 resistors, 16 connectors, 7 ICs, 6 transistors and 6 test points.

It belongs with the robotics & motion designs in this gallery.

From the project

* Main components are ESP32-S3, DRV8323HRTAR, 6x IRF7480

* Main components are ESP32-S3, DRV8323HRTAR, 6x IRF7480

Intgrated synchronous step down converter CAN-BUS, RS485 (both with switchable termination) USB-C, I2C All ceramic capacitors Power-LED Reset Button, Boot Button Thermal sensor breakable connector area optional MT6816 at the bottom PCB side parts available at jlcpcb, (5pcs = 113€) various GPIO; especially for external magnetic sensor desinged with KiCad with https://simplefoc.com/ in mind Four mounting holes dimensions 60mm x 52mm (63mm with big connectors) * currently COMPLETELY untested

Bldc sic, from the project README
From the project README

Main components on the Bldc sic

DRV8323HRTARESP32-S3-WROOM-1TP6841S6MT6816SRV05-4SN65HVD230SP3485

Bldc sic bill of materials (BOM)

113 components, 61 distinct parts — part numbers from the project's BOM.

QtyPartRefs
1
DRV8323HRTAR
U1
1
ESP32-S3-WROOM-1
U2
1
TP6841S6
U3
1
MT6816
U4
1
SRV05-4
U5
1
SN65HVD230
U6
1
SP3485
U7
6
IRF7480M
Q1, Q2, Q3, Q4, Q5, Q6
1
A
J1
1
B
J2
1
C
J3
1
48V
J4
1
GND
J5
1
EXT_MAG
J6
1
PROG
J7
1
USB_C_RECEPTACLE_USB2.0
USB_C_Receptacle_USB2.0
J8
2
CONN_01X06
Conn_01x06
J9, J10
1
A
J11
1
B
J12
1
C
J13
Show 41 more
QtyPartRefs
1
48V
J14
1
GND
J15
1
EXT_MAG
J16
2
ON TERM
SW1, SW3
1
C318884
RESET
SW2
1
C318884
BOOT
SW4
1
Thermistor
TH1
1
GHA
TP1
1
GLA
TP2
1
GHB
TP3
1
GLB
TP4
1
GHC
TP5
1
GLC
TP6
1
PSM712
D1
1
NUP2105
D6
1
C2286
Power
D7
1
10UH
10uH
L1
26
10U/50V
10u/50V
C1, C2, C3, C4, C5, C6, C7, C8 +18
2
U1/50V
u1/50V
C21, C26
6
C1525
u1
C22, C27, C33, C35, C41, C42
1
1U/50V
1u/50V
C23
1
47N/50V
47n/50V
C24
1
1U/6V3
1u/6V3
C25
1
u1
C34
2
22U
22u
C36, C37
5
10u/50V
C39, C43, C44, C45, C46
1
22U
22uF
C40
3
R001
R1, R2, R3
2
5K1
5k1
R4, R5
1
47K
47k
R6
1
15K
15k
R7
4
10K
10k
R9, R12, R18, R30
2
K12
R10, R27
1
C25076
k1
R11
1
K22
k22
R13
2
4K7
4k7
R14, R15
1
75k
R19
1
18k
R24
2
1k
R25, R26
1
22K
22k
R28
1
1k
R29

Bldc sic design files

The KiCad project lives in the klaus-liebler/esp32-bldc-controller repository on GitHub; these links point at the commit this page was built from.

Bldc sic: common questions

What microcontroller does the Bldc sic use?

The Bldc sic is built around the ESP32-S3-WROOM-1, from the ESP32 family.

How big is the Bldc sic PCB?

The Bldc sic measures 60 × 63 mm, has 2 copper layers and is 1.6 mm thick.

How many components are on the Bldc sic?

113 components, from 61 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.

Where can I download the Bldc sic design files?

From the klaus-liebler/esp32-bldc-controller repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.

Can I use the Bldc sic design in my own project?

Yes, under the terms of its MIT license, which klaus-liebler chose for the repository.

Can I test firmware for the Bldc sic without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.

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