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Build final

nathanfraske·CEC-Platform·build/route-clean/build-final.kicad_pcb

Build final PCB layout, top view — open source ESP32 board by nathanfraske
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About the Build final PCB

Build final is an open source ESP32 PCB design by nathanfraske, published on GitHub under the Apache-2.0 license. It is a 4-layer board measuring 96.1 × 43.7 mm, with 45 components from 24 distinct parts.

Its main chip is the ESP32-C6-MINI-1-N4, from the ESP32 family. Other key parts include the TJA1051T/3, LP5907MFX-3.3, INA238AIDGSR, INA181A2IDBVR and TLV7011DBVR. By type, the board carries 16 capacitors, 9 ICs, 8 resistors, 2 connectors, 2 switches and 2 diodes.

From the project

CEC is a modular PC power-telemetry system. Per-rail sensing modules connect to a central Hub over a single commodity cable (RJ-45). The Hub aggregates telemetry and forwards it to the host PC over USB. Four tiers — Standard, Pro, Enterprise, Mission Critical — are built from one

CEC is a modular PC power-telemetry system. Per-rail sensing modules connect to a central Hub over a single commodity cable (RJ-45). The Hub aggregates telemetry and forwards it to the host PC over USB. Four tiers — Standard, Pro, Enterprise, Mission Critical — are built from one fundamental design with progressively populated features.

Modules are tier-agnostic and degrade gracefully: any module works in any Hub, with higher-tier features going dormant when the Hub cannot service them and activating, without replacement, when the module is moved to a capable Hub.

Main components on the Build final

ESP32-C6-MINI-1-N4TJA1051T/3LP5907MFX-3.3INA238AIDGSRINA181A2IDBVRTLV7011DBVR

Build final bill of materials (BOM)

45 components, 24 distinct parts — part numbers from the project's BOM.

QtyPartRefs
1
ESP32-C6-MINI-1-N4
Espressif Systems
U1
1
TJA1051T/3
NXP
U2
1
LP5907MFX-3.3
Texas Instruments
U3
2
INA238AIDGSR
INA238
Texas Instruments
U10, U11
2
INA181A2IDBVR
Texas Instruments
U20, U21
2
TLV7011DBVR
Texas Instruments
U30, U31
1
KH-RJ45-58-8P8C
TO-HUB
Kinghelm
J1
1
U262-161N-4BVC11
USB-C 2.0
XKB Connection
J5
1
C1 PSU
J_IN1
1
C2 PSU
J_IN2
1
C1 LOAD
J_OUT1
1
C2 LOAD
J_OUT2
2
CSS2H-2512R-L500F
0.5mΩ
Bourns
RS1, RS2
1
TS-1088-AR02016
BOOT
XKB
SW1
1
TS-1088-AR02016
RESET
XKB
SW2
1
PESD5V0S1BA
Nexperia
D1
1
SS34
D2
2
CL10A105KB8NNNC
1uF
Samsung
C1, C2
11
CL05B104KO5NNNC
100nF
Samsung
C3, C4, C5, C8, C10, C11, C20, C21 +3
3
CL21A106KAYNNNE
10uF
Samsung
C6, C7, C9
Show 4 more
QtyPartRefs
3
0402WGF2201TCE
2.2kΩ
UNI-ROYAL
R1, R3, R4
2
0402WGF1002TCE
10kΩ
UNI-ROYAL
R2, R10
1
0402WGF1003TCE
100kΩ
UNI-ROYAL
R7
2
0402WGF5101TCE
5.1kΩ
UNI-ROYAL
R8, R9

Build final design files

The KiCad project lives in the nathanfraske/CEC-Platform repository on GitHub; these links point at the commit this page was built from.

Build final: common questions

What microcontroller does the Build final use?

The Build final is built around the ESP32-C6-MINI-1-N4, from the ESP32 family.

How big is the Build final PCB?

The Build final measures 96.1 × 43.7 mm, has 4 copper layers and is 1.6 mm thick.

How many components are on the Build final?

45 components, from 24 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.

Where can I download the Build final design files?

From the nathanfraske/CEC-Platform repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.

Can I use the Build final design in my own project?

Yes, under the terms of its Apache-2.0 license, which nathanfraske chose for the repository.

Can I test firmware for the Build final without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.

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