Pcie2-inrow routed
nathanfraske·CEC-Platform·build/route-pcie2-inrow/pcie2-inrow-routed.kicad_pcb
About the Pcie2-inrow routed PCB
Pcie2-inrow routed is an open source ESP32 PCB design by nathanfraske, published on GitHub under the Apache-2.0 license. It is a 4-layer board measuring 86.4 × 44 mm, with 45 components from 24 distinct parts.
Its main chip is the ESP32-C6-MINI-1-N4, from the ESP32 family. Other key parts include the TJA1051T/3, LP5907MFX-3.3, INA238AIDGSR, INA181A2IDBVR and TLV7011DBVR. By type, the board carries 16 capacitors, 9 ICs, 8 resistors, 2 connectors, 2 switches and 2 diodes.
From the project
CEC is a modular PC power-telemetry system. Per-rail sensing modules connect to a central Hub over a single commodity cable (RJ-45). The Hub aggregates telemetry and forwards it to the host PC over USB. Four tiers — Standard, Pro, Enterprise, Mission Critical — are built from one
CEC is a modular PC power-telemetry system. Per-rail sensing modules connect to a central Hub over a single commodity cable (RJ-45). The Hub aggregates telemetry and forwards it to the host PC over USB. Four tiers — Standard, Pro, Enterprise, Mission Critical — are built from one fundamental design with progressively populated features.
Modules are tier-agnostic and degrade gracefully: any module works in any Hub, with higher-tier features going dormant when the Hub cannot service them and activating, without replacement, when the module is moved to a capable Hub.
Main components on the Pcie2-inrow routed
Pcie2-inrow routed bill of materials (BOM)
45 components, 24 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | ESP32-C6-MINI-1-N4 Espressif Systems | ESP32-C6-MINI-1 | U1 |
| 1 | TJA1051T/3 NXP | SOIC-8_3.9x4.9mm_P1.27mm | U2 |
| 1 | LP5907MFX-3.3 Texas Instruments | SOT-23-5 | U3 |
| 2 | INA238AIDGSR INA238 Texas Instruments | VSSOP-10_3x3mm_P0.5mm | U10, U11 |
| 2 | INA181A2IDBVR Texas Instruments | SOT-23-6 | U20, U21 |
| 2 | TLV7011DBVR Texas Instruments | SOT-23-5 | U30, U31 |
| 1 | KH-RJ45-58-8P8C TO-HUB Kinghelm | RJ45_FTP_Shielded_Horizontal | J1 |
| 1 | U262-161N-4BVC11 USB-C 2.0 XKB Connection | USB_C_Receptacle_XKB_U262-16XN-4BVC11 | J5 |
| 1 | C1 PSU | Molex_Mini-Fit_Jr_45586_2x04_P4.20mm_Horizontal | J_IN1 |
| 1 | C2 PSU | Molex_Mini-Fit_Jr_45586_2x04_P4.20mm_Horizontal | J_IN2 |
| 1 | C1 LOAD | Molex_Mini-Fit_Jr_45586_2x04_P4.20mm_Horizontal | J_OUT1 |
| 1 | C2 LOAD | Molex_Mini-Fit_Jr_45586_2x04_P4.20mm_Horizontal | J_OUT2 |
| 2 | CSS2H-2512R-L500F 0.5mΩ Bourns | R_2512_6332Metric | RS1, RS2 |
| 1 | TS-1088-AR02016 BOOT XKB | TS-1088-AR02016 | SW1 |
| 1 | TS-1088-AR02016 RESET XKB | TS-1088-AR02016 | SW2 |
| 1 | PESD5V0S1BA Nexperia | D_SOD-323 | D1 |
| 1 | SS34 | D_SMA | D2 |
| 2 | CL10A105KB8NNNC 1uF Samsung | C_0603_1608Metric | C1, C2 |
| 11 | CL05B104KO5NNNC 100nF Samsung | C_0402_1005Metric | C3, C4, C5, C8, C10, C11, C20, C21 +3 |
| 3 | CL21A106KAYNNNE 10uF Samsung | C_0805_2012Metric | C6, C7, C9 |
Show 4 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 3 | 0402WGF2201TCE 2.2kΩ UNI-ROYAL | R_0402_1005Metric | R1, R3, R4 |
| 2 | 0402WGF1002TCE 10kΩ UNI-ROYAL | R_0402_1005Metric | R2, R10 |
| 1 | 0402WGF1003TCE 100kΩ UNI-ROYAL | R_0402_1005Metric | R7 |
| 2 | 0402WGF5101TCE 5.1kΩ UNI-ROYAL | R_0402_1005Metric | R8, R9 |
Pcie2-inrow routed design files
The KiCad project lives in the nathanfraske/CEC-Platform repository on GitHub; these links point at the commit this page was built from.
Pcie2-inrow routed: common questions
What microcontroller does the Pcie2-inrow routed use?
The Pcie2-inrow routed is built around the ESP32-C6-MINI-1-N4, from the ESP32 family.
How big is the Pcie2-inrow routed PCB?
The Pcie2-inrow routed measures 86.4 × 44 mm, has 4 copper layers and is 1.6 mm thick.
How many components are on the Pcie2-inrow routed?
45 components, from 24 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.
Where can I download the Pcie2-inrow routed design files?
From the nathanfraske/CEC-Platform repository on GitHub, which has the KiCad layout and the BOM; the links under Design files point to each one.
Can I use the Pcie2-inrow routed design in my own project?
Yes, under the terms of its Apache-2.0 license, which nathanfraske chose for the repository.
Can I test firmware for the Pcie2-inrow routed without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.
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