HardLabs

3117 AUSIGN

r4hulrr·ausign·hardware/main-board/3117_AUSIGN.kicad_pcb

3117 AUSIGN PCB layout, top view — open source ESP32 board by r4hulrr

About the 3117 AUSIGN PCB

3117 AUSIGN is an open source ESP32 PCB design by r4hulrr, published on GitHub under the MIT license. It is a 4-layer board measuring 60 × 60 mm, with 113 components from 40 distinct parts.

Its main chip is the ESP32-S3-WROOM-1, from the ESP32 family. Other key parts include the AP2112K-3.3, LSM6DSOTR, BQ24074RGT, ESDS314DBVR and CP2102N-A02-GQFN28. By type, the board carries 39 resistors, 33 capacitors, 12 connectors, 11 diodes, 9 ICs and 5 switches.

It belongs with the sensors, iot & wireless and audio designs in this gallery.

From the project

Real-time Auslan (Australian Sign Language) to English speech translation glove. Built with ESP32-S3, flex sensors, IMU on a custom PCB, and a Bluetooth-connected Python GUI.

Breaking communication barriers for the Australian Deaf community with an affordable, wearable, real-time Auslan-to-speech translation glove. Check out the demo video.

Unlike existing ASL-centric devices, AUSIGN is purpose-built for Auslan, incorporating contextual awareness via a heart-rate sensor, low-latency audio feedback, and Bluetooth connectivity for flexible output through a mobile/desktop app.

3117 AUSIGN, from the project README
From the project README

Main components on the 3117 AUSIGN

AP2112K-3.3LSM6DSOTRBQ24074RGTESDS314DBVRCP2102N-A02-GQFN28ESP32-S3-WROOM-1MAX98357A

3117 AUSIGN bill of materials (BOM)

113 components, 40 distinct parts.

QtyPartRefs
1
AP2112K-3.3
U1
1
LSM6DSOTR
U2
1
BQ24074RGT
U3
3
ESDS314DBVR
U4, U7, U10
1
CP2102N-A02-GQFN28
U6
1
ESP32-S3-WROOM-1
U8
1
MAX98357A
U9
1
IRLML6402TRPBF
Q1
2
SS8050
Q2, Q3
1
JST_PH_2P
J1
1
JST_SH_4P
J2
1
USB4105-GF-A
J3
6
JST_SH_2P
J4, J5, J6, J7, J8, J9
1
Conn_01x04_Pin
J10
1
Conn_01x04_Socket
J11
1
Conn_01x02_Pin
J12
4
PTS815SJK250SMTR
SW1, SW2, SW3, SW4
1
OS102011MS2QN1
SW6
1
MMBZ5233BLT1G
D1
1
SMF5.0A
D3
Show 20 more
QtyPartRefs
3
LTST-C190KGKT
D4, D7, D10
5
LTST-C190KFKT
D5, D6, D13, D14, D15
1
SP0503BAHT
D9
1
BLM18AG601SN1D
FB1
20
100n
C1, C2, C7, C8, C11, C14, C15, C20 +12
4
4u7
C3, C9, C12, C13
5
1u
C4, C5, C10, C18, C34
2
10u
C6, C35
2
22u
C32, C33
3
499
R2, R3, R4
4
4k7
R5, R6, R50, R51
1
100k
R7
16
10k
R8, R20, R21, R22, R23, R25, R26, R27 +8
2
1.5k
R9, R10
4
200
R11, R42, R43, R44
4
1k
R13, R14, R30, R37
2
5k1
R16, R17
1
22k1
R18
1
47k5
R19
1
634k
R47

3117 AUSIGN design files

The KiCad project lives in the r4hulrr/ausign repository on GitHub; these links point at the commit this page was built from.

3117 AUSIGN: common questions

What microcontroller does the 3117 AUSIGN use?

The 3117 AUSIGN is built around the ESP32-S3-WROOM-1, from the ESP32 family.

How big is the 3117 AUSIGN PCB?

The 3117 AUSIGN measures 60 × 60 mm, has 4 copper layers and is 1.6 mm thick.

How many components are on the 3117 AUSIGN?

113 components, from 40 distinct parts. The full bill of materials is listed on this page.

Where can I download the 3117 AUSIGN design files?

From the r4hulrr/ausign repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.

Can I use the 3117 AUSIGN design in my own project?

Yes, under the terms of its MIT license, which r4hulrr chose for the repository.

Can I test firmware for the 3117 AUSIGN without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.

More boards in ausign

Similar boards