HardLabs

Uplink

JimothyJohn·uplink·Hardware/ESP32-PoE-ISO_Rev_L.kicad_pcb

Uplink PCB layout, top view — open source ESP32 board by JimothyJohn

About the Uplink PCB

Uplink is an open source ESP32 PCB design by JimothyJohn, published on GitHub under the MIT license. It is a 4-layer board measuring 28 × 98.2 mm, with 130 components from 71 distinct parts.

Its main chip is the Q12MHz/20pF/10ppm/4P/3.2x2.5mm, from the ESP32 family. Other key parts include the CH340T(SSOP20W), TPS2376D(SO-8), BL4054B-42TPRN(SOT23-5), LAN8710A-EZC(QFN32) and TX4138(ESOIC-8). By type, the board carries 48 resistors, 30 capacitors, 10 diodes, 8 ICs, 5 inductors and 4 LEDs.

It belongs with the iot & wireless designs in this gallery.

From the project

Monitor machine states with a microcontroller

Monitor machinery with a microcontroller.

Installs dependencies and uploads the program.

- PlatformIO to build and upload the project - Terraform to configure your IoT cloud infrastructure - AWS account

- Development board - Current Sensor - NFC Tag

[x] Edge-side spectrum analysis with arduinoFFT

Main components on the Uplink

CH340T(SSOP20W)TPS2376D(SO-8)BL4054B-42TPRN(SOT23-5)LAN8710A-EZC(QFN32)TX4138(ESOIC-8)ESP32-WROVER-ESY8089AAAC(SOT23-5)SN74LVC1G04DBVR(SOT23-5)

Uplink bill of materials (BOM)

130 components, 71 distinct parts.

QtyPartRefs
1
CH340T(SSOP20W)
U1
1
TPS2376D(SO-8)
U2
1
BL4054B-42TPRN(SOT23-5)
U3
1
LAN8710A-EZC(QFN32)
U4
1
TX4138(ESOIC-8)
U5
1
ESP32-WROVER-E
U6
1
SY8089AAAC(SOT23-5)
U7
1
SN74LVC1G04DBVR(SOT23-5)
U8
1
Q12MHz/20pF/10ppm/4P/3.2x2.5mm
Q1
2
BC817-40(SOT23)
Q2, Q3
1
DW02S
BAT1
2
IT1185AU2
BUT1, RST1
1
F0505S-2WR2(SIP-7)
DCDC1
2
NS(HN1x10)
EXT1, EXT2
3
WPM2015-3/TR
FET1, FET2, FET3
3
Mounting_Hole_NPTH
MH1, MH2, MH3
1
TFC-9P-1.7H(ATFFS150A01BR016)
MICRO_SD1
3
RA1206_(4X0603)_4B8_2.2k
RM1, RM2, RM3
1
LMUN2211LT1G(SOT-23)
T1
1
ESDS314DBVR(SOT-23-5)
TVS1
Show 51 more
QtyPartRefs
2
NA(GG0402052R542P)
TVS2, TVS3
1
P-B-V-10-LF
UEXT1
1
MISB-SWMM-5B-LF(USB_MICRO)
USB-UART1
2
LED/YELLOW/0603
ACT1, CHRG1
1
LED/GREEN/0603
LNK1
1
LED/RED/0603
PWR1
6
1N5819S4/SOD123
D1, D3, D4, D6, D7, D9
1
BAT54C(SOT23-3)
D2
1
SS510/100V/5A/0.85V/DO214AB(SMC)
D5
1
NA(SMBJ6.0A)
D8
1
SMAJ58A/SMA
D10
3
FB0805/600R/2A
L1, L3, L5
1
2.2uH/1.5A/DCR=72mR/20%/3.00x3.00x1.50mm/CD32(NR3015T2R2M)
L2
1
33uH/2.1A/DCR=0.1R/20%/DBS135(PD3316MT330)
L4
8
22uF/6.3V/20%/X5R/C0603
C1, C6, C7, C9, C10, C13, C19, C22
1
1nF/2000V/10%/X7R/C1206
C2
1
47uF/6.3V/20%/X5R/C0805
C3
2
27pF/50V/5%/C0G/C0402
C4, C5
7
100nF/16V/10%/X7R/C0402
C8, C11, C14, C15, C16, C18, C29
2
100nF/100V/10%/X7R/C0603
C12, C24
1
2.2uF/6.3V/10%/X5R/C0603
C17
1
NA(1.0nF/3kV/10%/X7R/SMD/1808(VISHAY-VJ1808Y102KBHAT4X_Farnell-2407291))
C20
1
NA(10uF/6.3V/20%/X5R/C0603)
C21
1
1.0nF/3kV/10%/X7R/SMD/1808(VISHAY-VJ1808Y102KBHAT4X_Farnell-2407291)
C23
1
12pF/50V/5%/COG/C0402
C25
1
470uF/10V/20%/Low_ESR/RM2.5/6.0x11mm
C26
1
15uF/100V/20%/RM2.5/6.3x11mm(Farnell:1281844)
C27
1
1nF/50V/10%/X7R/C0402
C28
1
1uF/10V/20%/X5R/C0603
C31
12
10k/R0402
R1, R2, R6, R18, R19, R25, R32, R36 +4
3
1k/R0402
R3, R20, R21
1
47k/R0402
R4
6
2.2k/R0402
R5, R8, R14, R15, R31, R35
2
470k/R0402
R7, R16
1
100k/R0402
R9
4
49.9R/1%/R0402
R10, R11, R12, R13
2
NA/R0402
R17, R49
1
24.9k/1%/R0402
R22
1
180k/1%/R0402
R23
3
220R/R0402
R24, R46, R47
1
12.1k/1%/R0402
R26
1
4.42k/1%/1/16W/R0402
R27
1
0.03R/1%/R1206
R28
1
220k/R0402
R29
1
49.9k/1%/R0402
R30
1
4.7R/R0402
R33
1
10.5k/1%/R0402
R34
1
56.2k/1%/R0402
R38
2
10R/R0402
R40, R42
1
4.7k/R2512
R41
1
130k/R0402
R43

Uplink design files

The KiCad project lives in the JimothyJohn/uplink repository on GitHub; these links point at the commit this page was built from.

Uplink: common questions

What microcontroller does the Uplink use?

The Uplink is built around the Q12MHz/20pF/10ppm/4P/3.2x2.5mm, from the ESP32 family.

How big is the Uplink PCB?

The Uplink measures 28 × 98.2 mm, has 4 copper layers and is 1.6 mm thick.

How many components are on the Uplink?

130 components, from 71 distinct parts. The full bill of materials is listed on this page.

Where can I download the Uplink design files?

From the JimothyJohn/uplink repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.

Can I use the Uplink design in my own project?

Yes, under the terms of its MIT license, which JimothyJohn chose for the repository.

Can I test firmware for the Uplink without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug ESP32 firmware against it before you order a PCB.

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