CPArti-FPGA-Development-Board

AAWO·CPArti-FPGA-Development-Board

CPArti-FPGA-Development-Board layout, top view — open source FPGA board by AAWO
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About the CPArti-FPGA-Development-Board

CPArti-FPGA-Development-Board is an open source FPGA PCB design by AAWO, published on GitHub. It is a 4-layer board measuring 100 × 100 mm, with 393 components from 109 distinct parts.

Its main chip is the XC7A50T-FTG256, from the FPGA family. Other key parts include the FT232H, IS61WV25616EDBLL, ASDM1-24MHz, TPS54561 and TPS62823DLC. By type, the board carries 162 resistors, 128 capacitors, 27 diodes, 25 ICs, 17 connectors and 9 switches.

It belongs with the usb & debug tools, dev boards & breakouts and displays & leds designs in this gallery.

From the project

A fairly low-cost 4-layer AMD/Xilinx Artix-7 FPGA development board designed in KiCad, with bidirectional and unidirectional high-speed signals, SRAM, DAC and USB-C connection with built-in JTAG programmer.

A fairly low-cost 4-layer AMD/Xilinx Artix-7 FPGA development board with bidirectional and unidirectional high-speed signals, SRAM, DAC and USB-C connection with built-in JTAG programmer. Designed for JLC04161H-7628 layer stackup in KiCad. All available components include JLCPCB parts numbers for assembly. The project includes KiBot configuration for documentation and production files generation automation.

CPArti-FPGA-Development-Board, from the project README
From the project README

Main components on the CPArti-FPGA-Development-Board

CPArti-FPGA-Development-Board bill of materials (BOM)

393 components, 109 distinct parts.

QtyPartRefs
1
XC7A50T-FTG256
U1
1
FT232H
U2
1
IS61WV25616EDBLL
U3
1
ASDM1-24MHz
U4
1
TPS54561
U5
3
TPS62823DLC
U6, U7, U8
1
MX25L3233FM1
U9
1
93LC56BT-I/OT
U10
1
LM3881
U11
1
AS169-73LF
U12
1
74HC14
U13
1
MAX7219
U14
2
XLITX 3641AS
U15, U16
5
SN74LVC1T45DCK
U17, U18, U19, U21, U22
1
DS1023
U20
1
USBLC6-2SC6
U23
1
AD9744
U24
1
OPA356AID
U25
6
2N7002
Q1, Q2, Q3, Q4, Q5, Q6
1
12 MHz
Y1
Show 89 more
QtyPartRefs
1
USB_C_Receptacle_USB2.0_16P
J1
1
Barrel_Jack_Switch
J2
1
JTAG
J3
1
Si_{A}
J4
1
So_{A}
J5
1
Bp
J6
1
So_{B}
J7
1
Bn_{A}
J8
1
Bn_{B}
J9
1
Ref
J10
1
Si_{B}
J11
1
master
J12
1
slave
J13
1
Delay IN
J14
1
Delay OUT
J15
1
Conn_02x10_Odd_Even
J16
1
DAC
J18
5
SW_Push
BTN0, BTN1, BTN2, BTN3, BTN4
1
RESET
BTN6
1
PROGRAM
BTN7
1
MODE
JP1
1
PWR SEQ INV
JP2
1
DAC GND
JP3
8
SW_SPDT
SW0, SW1, SW2, SW3, SW4, SW5, SW6, SW7
1
SW_DIP_x08
SW8
1
INIT
D1
1
DONE
D2
1
PWR 5V0
D3
1
PWR 3V3
D4
1
PWR 1V8
D5
1
PWR 1V0
D6
3
PDS760
D7, D8, D9
1
B_{n}ON
D10
1
B_{p}ON
D11
1
ST1
D12
1
ST2
D13
1
ST3
D14
1
ST4
D15
1
M~{S}
D16
1
SYS_{lock}
D17
1
PSFD_{lock}
D18
1
BMUX_{lock}
D19
1
LD1
D20
1
LD2
D21
1
LD3
D22
1
LD4
D23
4
ESD9B3.3ST5G
D24, D25, D26, D27
4
BLM15AG601SN1D
FB1, FB2, FB3, FB4
1
6.8uH/6.8A
L1
3
470nH/7.6A
L2, L3, L4
16
4.7u
C1, C3, C8, C17, C24, C34, C35, C42 +8
37
100n
C2, C4, C5, C6, C7, C9, C10, C11 +29
2
20p
C12, C13
9
47u
C14, C15, C36, C44, C45, C60, C73, C74 +1
30
470n
C16, C18, C19, C20, C21, C22, C23, C26 +22
1
100u
C27
16
10u
C62, C63, C64, C76, C78, C79, C80, C82 +8
4
2u2
C65, C66, C67, C68
5
10n
C69, C89, C90, C91, C92
1
4n7
C70
1
47p
C71
3
120p
C77, C81, C85
1
10u
C103
1
330u
C120
1
~
C121
28
22R
R1, R2, R3, R4, R49, R85, R86, R87 +20
11
1k
R5, R6, R26, R27, R28, R30, R32, R34 +3
15
330R
R7, R36, R37, R38, R39, R40, R41, R42 +7
4
4k7
R8, R9, R10, R103
35
100
R11, R12, R13, R14, R15, R16, R17, R18 +27
9
0
R23, R24, R25, R52, R135, R136, R137, R138 +1
31
10k
R29, R31, R33, R35, R54, R55, R69, R73 +23
2
25R5
R46, R47
4
2k
R48, R101, R102, R142
2
5k1
R50, R51
1
12k/1%
R53
1
243k
R56
1
12k
R57
1
62k
R58
6
100k
R60, R64, R70, R71, R72, R162
1
150k
R61
1
300k
R62
1
200k
R63
1
120k
R65
2
160k
R66, R67
1
500
R68
1
49R9
R140
1
16k9
R141
2
226
R158, R159

CPArti-FPGA-Development-Board design files

The KiCad project lives in the AAWO/CPArti-FPGA-Development-Board repository on GitHub; these links point at the commit this page was built from.

CPArti-FPGA-Development-Board: common questions

What microcontroller does the CPArti-FPGA-Development-Board use?

The CPArti-FPGA-Development-Board is built around the XC7A50T-FTG256, from the FPGA family.

How big is the CPArti-FPGA-Development-Board?

The CPArti-FPGA-Development-Board measures 100 × 100 mm, has 4 copper layers and is 1.6062 mm thick.

How many components are on the CPArti-FPGA-Development-Board?

393 components, from 109 distinct parts. The full bill of materials is listed on this page.

Where can I download the CPArti-FPGA-Development-Board design files?

From the AAWO/CPArti-FPGA-Development-Board repository on GitHub, which has the KiCad layout and the schematic; the links under Design files point to each one.

Can I use the CPArti-FPGA-Development-Board design in my own project?

The repository has no license, so all rights stay with AAWO. Use it as a reference, and ask the author before reusing the design.

Can I test firmware for the CPArti-FPGA-Development-Board without the hardware?

Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug FPGA firmware against it before you order a PCB.

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