XIAO
feastorg·KiCad-Master-Lib·vendor/OPL_Kicad_Library/XIAO Family/XIAO.kicad_pcb
About the XIAO PCB
XIAO is an open source RP2040/RP2350 PCB design by feastorg, published on GitHub under the CC0-1.0 license. It is a 2-layer board measuring 203.1 × 125.1 mm, with 21 components from 21 distinct parts.
Its main chip is the XIAO-RP2040-SMD, from the RP2040/RP2350 family. Other key parts include the XIAO-SAMD21-SMD, XIAO-nRF52840-SMD, XIAO-SAMD21-DIP, XIAO-RP2040-DIP and XIAO-nRF52840-DIP.
From the project
Our central library for symbols, footprints, 3D models, and design blocks in KiCad.
Dive into a world of innovation with our curated collection of hardware components straight from the electronics hub of Shenzhen, complemented by an array of parts supported by Seeed Studio. Our mission is to empower makers, developers, and hardware enthusiasts with a diverse repository that streamlines innovation and accelerates development.
The Seeed Fusion Open Parts Libraries (OPL) and the associated component libraries are provided and maintained by the Seeed Studio Fusion team and the wider community for the turnkey Seeed Fusion PCB Assembly (PCBA) Service.

Main components on the XIAO
XIAO bill of materials (BOM)
21 components, 21 distinct parts — part numbers from the project's BOM.
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | XIAO-SAMD21-SMD | XIAO-SAMD21-SMD | U1 |
| 1 | XIAO-RP2040-SMD | XIAO-RP2040-SMD | U2 |
| 1 | XIAO-nRF52840-SMD | XIAO-nRF52840-SMD | U3 |
| 1 | XIAO-SAMD21-DIP | XIAO-SAMD21-DIP | U4 |
| 1 | XIAO-RP2040-DIP | XIAO-RP2040-DIP | U5 |
| 1 | XIAO-nRF52840-DIP | XIAO-nRF52840-DIP | U6 |
| 1 | XIAO-ESP32-C6-SMD | XIAO-ESP32-C6-SMD | U7 |
| 1 | XIAO-ESP32-C3-SMD | XIAO-ESP32-C3-SMD | U8 |
| 1 | XIAO-ESP32-S3-SMD | XIAO-ESP32-S3-SMD | U9 |
| 1 | XIAO-ESP32-C6-DIP | XIAO-ESP32-C6-DIP | U10 |
| 1 | XIAO-ESP32-S3-DIP | XIAO-ESP32-S3-DIP | U11 |
| 1 | XIAO-ESP32-C3-DIP | XIAO-ESP32-C3-DIP | U12 |
| 1 | XIAO-RP2350-SMD | XIAO-RP2350-SMD | U13 |
| 1 | XIAO-R4-SMD | XIAO-R4-SMD | U14 |
| 1 | XIAO-RP2350-DIP | XIAO-RP2350-DIP | U16 |
| 1 | XIAO-R4-DIP | XIAO-R4-DIP | U17 |
| 1 | XIAO-ESP32-C5-SMD | XIAO-ESP32-C5-SMD | U18 |
| 1 | XIAO-ESP32-S3-Plus-SMD | XIAO-ESP32-S3-Plus-SMD | U19 |
| 1 | XIAO-MG24-SMD | XIAO-MG24-SMD | U20 |
| 1 | XIAO-nRF54l15-SMD | XIAO-nRF54l15-SMD | U21 |
Show 1 more
| Qty | Part | Footprint | Refs |
|---|---|---|---|
| 1 | XIAO-nRF52840-Plus-SMD | XIAO-nRF52840-Plus-SMD | U22 |
XIAO design files
The KiCad project lives in the feastorg/KiCad-Master-Lib repository on GitHub; these links point at the commit this page was built from.
XIAO: common questions
What microcontroller does the XIAO use?
The XIAO is built around the XIAO-RP2040-SMD, from the RP2040/RP2350 family.
How big is the XIAO PCB?
The XIAO measures 203.1 × 125.1 mm, has 2 copper layers and is 1.6 mm thick.
How many components are on the XIAO?
21 components, from 21 distinct parts, with part numbers taken from the project's own BOM. The full bill of materials is listed on this page.
Where can I download the XIAO design files?
From the feastorg/KiCad-Master-Lib repository on GitHub, which has the KiCad layout, the schematic and the BOM; the links under Design files point to each one.
Can I use the XIAO design in my own project?
Yes, under the terms of its CC0-1.0 license, which feastorg chose for the repository.
Can I test firmware for the XIAO without the hardware?
Yes. HardLabs builds a simulation of the board from its netlist and BOM, so you can run and debug RP2040/RP2350 firmware against it before you order a PCB.
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