1 open source board using the CE-mark
Real designs built with the CE-mark, from public GitHub projects: a quick way to see how others power, decouple and connect it. Each board comes with its KiCad files, full parts list and a render — and you can simulate its firmware on HardLabs.
axelloThe CE-mark in open source designs
The gallery holds 1 open source boards using the CE-mark from 1 GitHub repository; a typical one measures about 50 × 32.8 mm and carries around 23 components.
100% are two-layer designs, the rest use four layers or more, and 0% carry an open source license.
The most starred is 1w grove v0.1 by axello.
Microcontrollers on boards using the CE-mark
CE-mark: common questions
Where can I find a CE-mark reference design?
Each of the 1 boards on this page is a real design using the CE-mark. Open one to see how it is wired up, with the full BOM, a render of the layout and links to its KiCad files.
Which microcontrollers do boards using the CE-mark use?
Most are built on ESP32 (1).
How big is a typical board using the CE-mark?
The median is 50 × 32.8 mm, and 100% are two-layer designs.
What is the most popular open source board using the CE-mark?
By GitHub stars, 1w grove v0.1 by axello, with 1 stars.
Can I simulate one of these boards using the CE-mark before building it?
Yes. HardLabs turns a board's netlist and BOM into a working simulation, so you can boot and test firmware against it with no hardware on your desk.