1 open source board using the XIAO_left_socket
Real designs built with the XIAO_left_socket, from public GitHub projects: a quick way to see how others power, decouple and connect it. Each board comes with its KiCad files, full parts list and a render — and you can simulate its firmware on HardLabs.
The XIAO_left_socket in open source designs
The gallery holds 1 open source boards using the XIAO_left_socket from 1 GitHub repository; a typical one measures about 100 × 30 mm and carries around 13 components.
100% are two-layer designs, the rest use four layers or more, and 100% carry an open source license.
The most starred is Eda pcb designer by yupipi93.
What boards using the XIAO_left_socket are built for
XIAO_left_socket: common questions
Where can I find a XIAO_left_socket reference design?
Each of the 1 boards on this page is a real design using the XIAO_left_socket. Open one to see how it is wired up, with the full BOM, a render of the layout and links to its KiCad files.
How big is a typical board using the XIAO_left_socket?
The median is 100 × 30 mm, and 100% are two-layer designs.
What is the most popular open source board using the XIAO_left_socket?
By GitHub stars, Eda pcb designer by yupipi93, with 0 stars.
Can I simulate one of these boards using the XIAO_left_socket before building it?
Yes. HardLabs turns a board's netlist and BOM into a working simulation, so you can boot and test firmware against it with no hardware on your desk.